Display panel, and display device including the same
US-2024341144-A1 · Oct 10, 2024 · US
US9608050B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9608050-B2 |
| Application number | US-201514800247-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 15, 2015 |
| Priority date | May 30, 2013 |
| Publication date | Mar 28, 2017 |
| Grant date | Mar 28, 2017 |
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An organic light emitting diode (OLED) display including: a substrate; a semiconductor layer disposed on the substrate and including a switching semiconductor layer and a driving semiconductor layer connected to the switching semiconductor layer; a first gate insulating layer disposed on the semiconductor layer; a switching gate electrode and a driving gate electrode disposed on the first gate insulating layer and respectively overlapping with the switching semiconductor layer and the driving semiconductor layer; a second gate insulating layer disposed on the switching gate electrode and the driving gate electrode; a driving voltage line configured to transmit a driving voltage and disposed on the second gate insulating layer; an interlayer insulating layer disposed on the driving voltage line and the second gate insulating layer; and a data line configured to transmit a data signal and disposed on the interlayer insulating layer.
Opening claim text (preview).
What is claimed is: 1. A pixel circuit of a display device, the pixel circuit comprising: a semiconductor layer comprising a driving semiconductor layer, a switching semiconductor layer, a compensation semiconductor layer, an operation control semiconductor layer, and a light emission control semiconductor layer in a single continuous layer such that a first end of the driving semiconductor layer is connected to the switching semiconductor layer and the operation control semiconductor layer, and a second end of the driving semiconductor layer is connected to the compensation semiconductor layer and the light emission control semiconductor layer; a gate insulating layer disposed on the semiconductor layer; a driving voltage line configured to transmit a driving voltage; a data line configured to transmit a data signal; and an interlayer insulating layer disposed between the driving voltage line and the data line. 2. The circuit of claim 1 , wherein the interlayer insulating layer is disposed directly on the driving voltage line, and the data line is disposed directly on the interlayer insulating layer. 3. The circuit of claim 1 , wherein the driving semiconductor layer has a zigzag shape in a plan view. 4. A pixel circuit of a display device, the pixel circuit comprising: a semiconductor layer comprising a driving semiconductor layer, a switching semiconductor layer, a compensation semiconductor layer, an operation control semiconductor layer, and a light emission control semiconductor layer such that the driving semiconductor layer is connected to each of the switching semiconductor layer, the compensation semiconductor layer, the operation control semiconductor layer, and the light emission control semiconductor layer via the semiconductor layer; a gate insulating layer disposed on the semiconductor layer; a driving voltage line configured to transmit a driving voltage; a data line configured to transmit a data signal; and an interlayer insulating layer disposed between the driving voltage line and the data line, wherein: the driving semiconductor layer has a curved shape in a plan view; and the semiconductor layer further comprises an initialization semiconductor layer and a bypass semiconductor layer, the initialization semiconductor layer connecting the bypass semiconductor layer with the compensation semiconductor layer.
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