Image pickup device and electronic apparatus

Patent metadata

Field	Value
Publication number	US-9602746-B2
Application number	US-201414313409-A
Country	US
Kind code	B2
Filing date	Jun 24, 2014
Priority date	Jul 1, 2013
Publication date	Mar 21, 2017
Grant date	Mar 21, 2017

Abstract

An image pickup device includes on a silicon layer: a photodiode provided on each pixel basis to perform photoelectric conversion to generate a charge depending on the light receiving amount; a floating diffusion section configured to store the charge generated by the photodiode; and a transistor configured to output a pixel signal at a voltage in accordance with a level of the charge stored in the floating diffusion section, wherein the image pickup device further includes a hermetically-sealed cavity section inside the silicon layer and on at least one of the underside of the floating diffusion section and the underside of a channel body region of the transistor.

First claim

What is claimed is:

1. An image pickup device, comprising:
a silicon layer;
a photodiode provided on the silicon layer and corresponding to a pixel that performs photoelectric conversion and generates a charge depending on a light-receiving amount;
a floating diffusion section configured to store the charge generated by the photodiode;
a transistor configured to output a pixel signal at a voltage in accordance with a level of the charge stored in the floating diffusion section; and
a hermetically-sealed cavity section inside the silicon layer and on at least one of an underside of the floating diffusion section and an underside of a channel body region of the transistor, wherein the hermetically-sealed cavity section is hollow.

2. The image pickup device according to claim 1 , wherein the cavity section is formed in contact with the floating diffusion section when the cavity section is formed on the underside of the floating diffusion section, and the cavity section is formed in contact with the channel body region when the cavity section is formed on the underside of the channel body region.

3. The image pickup device according to claim 2 , wherein the cavity section comprises a hydrogen annealed trench on the silicon layer with migrated silicon at a periphery of the trench.

4. An electronic apparatus, comprising:
an image pickup device on a silicon layer;
a signal processing circuit that carries out a predetermined processing operation for a pixel signal output from the image pickup device;
a photodiode corresponding to a pixel that performs photoelectric conversion and generates a charge depending on a light-receiving amount;
a floating diffusion section that stores the charge generated by the photodiode;
a transistor that outputs a pixel signal at a voltage in accordance with a level of the charge stored in the floating diffusion section; and
a hermetically-sealed cavity section inside the silicon layer and on at least one of an underside of the floating diffusion section and an underside of a channel body region of the transistor, wherein the hermetically-sealed cavity section is hollow.

5. The image pickup device according to claim 1 , wherein the cavity section is formed on the underside of the floating diffusion section and on the underside of the channel body region.

6. The image pickup device according to claim 2 , wherein the cavity section is formed on the underside of the floating diffusion section and on the underside of the channel body region.

7. The image pickup device according to claim 1 , wherein the transistor is an amplifying transistor.

8. The image pickup device according to claim 2 , wherein the transistor is an amplifying transistor.

9. The image pickup device according to claim 1 , further comprising a well layer that surrounds each of the floating diffusion section and on the underside of the channel body region.

10. The image pickup device according to claim 9 , wherein the well layer comprises a diffusion layer capacitance.

11. The image pickup device according to claim 2 , further comprising a well layer that surrounds each of the floating diffusion section and the underside of the channel body region.

12. The image pickup device according to claim 11 , wherein the well layer comprises a diffusion layer capacitance.

13. The electronic apparatus according to claim 4 , wherein the cavity section is formed in contact with the floating diffusion section when the cavity section is formed on the underside of the floating diffusion section, and the cavity section is formed in contact with the channel body region when the cavity section is formed on the underside of the channel body region.

14. The electronic apparatus according to claim 13 , wherein the cavity section comprises a hydrogen annealed trench on the silicon layer with migrated silicon at a periphery of the trench.

Assignees

• Sony Corp

Inventors

• Miyanami Yuki

Classifications

• H04N25/77 Primary

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/767

  Horizontal readout lines, multiplexers or registers · CPC title

• H01L27/14643

  Electricity · mapped topic

• H04N5/3742

  Electricity · mapped topic

• H01L27/14689

  Electricity · mapped topic