Apparatus and method for combining currents from passive equalizer in sense amplifier

Patent metadata

Field	Value
Publication number	US-9602317-B1
Application number	US-201514880916-A
Country	US
Kind code	B1
Filing date	Oct 12, 2015
Priority date	Oct 12, 2015
Publication date	Mar 21, 2017
Grant date	Mar 21, 2017

Abstract

An apparatus configured to apply equalization to an input data signal and detect data based on the equalized data signal. The apparatus includes a passive equalizer comprising a first signal path configured to generate a first signal based on an input signal, and a second signal path configured to generate a second signal by filtering the input signal. The apparatus further includes a sense amplifier having an input circuit configured to generate a third signal related to a combination of the first and second signals, and a data detection circuit configured to generate data based on the third signal. The data detection circuit may be configured as a strong-arm latch. The third signal may be a differential current signal including positive and negative current components. The strong-arm latch generating data based on whether the positive current component is greater than the negative current component.

First claim

What is claimed is:

1. An apparatus, comprising:
a passive equalizer comprising a first signal path configured to generate a first signal based on an input signal, and a second signal path configured to generate a second signal by filtering the input signal; and
a sense amplifier comprising:
a circuit configured to discharge or charge first and second nodes in response to a first state of a clock signal;
an input circuit configured to generate a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and
a data detection circuit configured to generate data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node; and

wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and
wherein the input circuit is further configured to:
generate a first current based on the first positive component of the first differential signal;
generate a second current based on the first negative component of the first differential signal;
generate a third current based on the second positive component of the second differential signal; and
generate a fourth current based on the second negative component of the second differential signal; and
wherein the third signal comprises a fifth current related to a sum of the first and fourth currents, and a sixth current related to a sum of the second and third currents.

2. The apparatus of claim 1 , wherein the second signal path comprises a high-pass filter.

3. The apparatus of claim 1 , wherein the second signal path comprises a low-pass filter.

4. The apparatus of claim 1 , wherein the first signal path comprises an all-pass path.

5. An apparatus, comprising:
a passive equalizer comprising a first signal path configured to generate a first signal based on an input signal, and a second signal path configured to generate a second signal by filtering the input signal; and
a sense amplifier comprising:
a circuit configured to discharge or charge first and second nodes in response to a first state of a clock signal;
an input circuit configured to generate a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and
a data detection circuit configured to generate data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node; and

wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and
wherein the input circuit is further configured to:
generate a first current based on the first positive component of the first differential signal; and
generate a second current based on the first negative component of the first differential signal;
generate a third current based on the second positive component of the second differential signal; and
generate a fourth current based on the second negative component of the second differential signal;
wherein the third signal comprises a fifth positive current related to a sum of the first and third currents, and a sixth negative current related to a sum of the second and fourth currents.

6. The apparatus of claim 5 , wherein the data detection circuit is configured to generate the data based on whether the fifth current is greater than the sixth current.

7. A method, comprising:
generating a first signal based on an input signal;
filtering the input signal to generate a second signal;
discharging or charging first and second nodes in response to a first state of a clock signal;
generating a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and
generating data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node; and
wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and
wherein generating the third signal further comprises:
generating a first current based on the first positive component of the first differential signal; and
generating a second current based on the first negative component of the first differential signal;
generating a third current based on the second positive component of the second differential signal; and
generating a fourth current based on the second negative component of the second differential signal;
wherein the third signal comprises a fifth current related to a sum of the first and fourth currents, and a sixth current related to a sum of the second and third currents.

8. The method of claim 7 , wherein filtering the input signal comprises high-pass filtering the input signal.

9. The method of claim 7 , wherein filtering the input signal comprises low-pass filtering the input signal.

10. The method of claim 7 , wherein generating the first signal comprises passing the input signal through an all-pass path.

11. A method, comprising:
generating a first signal based on an input signal;
filtering the input signal to generate a second signal;
discharging or charging first and second nodes in response to a first state of a clock signal;
generating a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and
generating data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node; and
wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and
wherein generating the third signal further comprises:
generating a first current based on the first positive component of the first differential signal; and
generating a second current based on the first negative component of the first differential signal;
generating a third current based on the second positive component of the second differential signal; and
generating a fourth current based on the second negative component of the second differential signal;
wherein the third signal comprises a fifth current related to a sum of the first and fourth currents, and a sixth current related to a sum of the second and third currents.

12. The method of claim 11 , wherein generating the data comprises generating the data based on whether the fifth current is greater than the sixth current.

13.

Assignees

• Qualcomm Inc

Inventors

• Hailu Eskinder
• Cohen Hanan
• Pandita Bupesh

Classifications

• H04B1/04

  Circuits · CPC title

• H04L25/03885 Primary

  adaptive · CPC title

• H04B2001/0408

  with power amplifiers · CPC title

• H04B3/18 Primary

  wherein the network comprises semiconductor devices · CPC title

• H03G5/24

  in frequency-selective amplifiers · CPC title