Distributed amplifier

Patent metadata

Field	Value
Publication number	US-9602061-B2
Application number	US-201514610283-A
Country	US
Kind code	B2
Filing date	Jan 30, 2015
Priority date	Mar 10, 2014
Publication date	Mar 21, 2017
Grant date	Mar 21, 2017

Abstract

A distributed amplifier includes a plurality of transistors, a first line connecting gate electrodes of the transistors to each other, and a second line connecting drain electrodes of the transistors to each other, wherein the first line and the second line are electromagnetically coupled to each other at a position situated between immediately adjacent transistors among the plurality of transistors.

First claim

What is claimed is:

1. A distributed amplifier, comprising:
a plurality of transistors;
a first line connecting gate electrodes of the transistors to each other; and
a second line connecting drain electrodes of the transistors to each other,
wherein the first line and the second line are electromagnetically coupled to each other at a position situated between immediately adjacent transistors among the plurality of transistors,
wherein a distance between the first line and the second line is a first length at positions at which the first line and the second line are connected to the transistors, and is a second length shorter than the first length at the position situated between the immediately adjacent transistors among the plurality of transistors, the distance between the first line and the second line being defined as a distance between a straight line segment of the first line and a straight line segment of the second line.

2. The distributed amplifier as claimed in claim 1 , wherein the first line and the second line are placed in a same interconnect layer.

3. The distributed amplifier as claimed in claim 1 , wherein the first line and the second line are placed in two respective interconnect layers that have an insulating layer placed therebetween.

4. The distributed amplifier as claimed in claim 1 , wherein the distance between the first line and the second line at the position situated between the immediately adjacent transistors is shorter than a gate width of the transistors.

Assignees

• Fujitsu Ltd

Inventors

• Niida Yoshitaka

Classifications

• H03F3/193

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F3/607

  using FET's · CPC title

• H03F3/21

  with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

• H03F1/18 Primary

  by use of distributed coupling {, i.e. distributed amplifiers (distributed amplifiers using coupling networks with distributed constants H03F3/605)} · CPC title

• H03F2200/108

  A coil being added in the drain circuit of a FET amplifier stage, e.g. for noise reducing purposes · CPC title