Intelligent pulse control circuit

US9601989B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9601989-B2
Application numberUS-201514816128-A
CountryUS
Kind codeB2
Filing dateAug 3, 2015
Priority dateMay 8, 2015
Publication dateMar 21, 2017
Grant dateMar 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The instant disclosure provides an intelligent pulse control circuit used for a power supply. The intelligent pulse control circuit comprises a control unit, a buffer unit, a comparing unit and a switch unit. The buffer receives a loading signal. The comparing unit is coupled to the buffer unit, receives the loading signal generated according to the current of the output loading, and compares the loading signal and the feedback signal to generate a control signal. The switch unit is controlled by the control signal of the comparing unit to provide a turn-off signal. When the output loading is light load, the switch unit controls the control unit to disable the PFC stage and the PWM stage according to the turn-off signal. Accordingly, the intelligent pulse control circuit can reduce the power consumption when the output loading is light load.

First claim

Opening claim text (preview).

What is claimed is: 1. An intelligent pulse control circuit used for a power supply, the power supply having a power factor correction stage and a pulse width modulation stage, the power factor correction stage coupled to the pulse-with modulation stage, the pulse width modulation stage generating a loading signal according to the current of an output loading, the voltage outputted from the power factor correction stage to the pulse width modulation stage being a feedback signal, the intelligent pulse control circuit comprising: a control unit, coupled to the power factor correction stage and the pulse width modulation stage; a buffer unit, receiving the loading signal; a comparing unit, coupled to the buffer unit, receiving the loading signal through the buffer unit, and comparing the loading signal and the feedback signal to generate a control signal; and a switch unit, coupled to the comparing unit and the control unit, controlled by the control signal of the comparing unit to provide a turn-off signal, wherein when the output loading is light load, the switch unit controls the control unit to disable the power factor correction stage and the pulse width modulation stage according to the turn-off signal. 2. The intelligent pulse control circuit according to claim 1 , wherein the switch unit transmits the turn-off signal to the control unit when the output loading is light load, the switch unit does not transmit the turn-off signal to the control unit when the output loading is heavy load. 3. The intelligent pulse control circuit according to claim 1 , wherein the turn-off signal is a pulse width modulation signal for controlling the pulse width modulation stage by the control unit, when the output loading is light load the switch unit couples the pulse width modulation signal to a ground, such that the pulse width modulation signal is at a low voltage level. 4. The intelligent pulse control circuit according to claim 1 , wherein the loading signal is presented in voltage, wherein the heaver the output loading is, the higher the voltage level of the loading signal is, wherein the lighter the output loading is, the lower the voltage of the loading signal is. 5. The intelligent pulse control circuit according to claim 1 , wherein the buffer is a unit gain amplifier. 6. The intelligent pulse control circuit according to claim 1 , wherein the comparing unit comprises: an operational amplifier, having a non-inverted input terminal, an inverted input terminal and an output terminal, the non-inverted input terminal of the operational amplifier coupled to the buffer for receiving the loading signal, the inverted input terminal receiving the feedback signal, the output terminal generating the control signal. 7. The intelligent pulse control circuit according to claim 6 , wherein the switch unit comprises: a first transistor, a control terminal of the first transistor coupled to the output terminal of the operational amplifier for receiving the control signal, a first terminal of the first transistor coupled to a ground; and a second transistor, a control terminal of the second transistor coupled to a second terminal of the first transistor and a bias voltage, a first terminal of the second transistor coupled to the control unit, a second terminal of the second transistor receiving the turn-off signal. 8. The intelligent pulse control circuit according to claim 7 , wherein when the output loading is light load the control signal cuts off the first transistor, and then the second transistor is conducted due to the bias voltage for conducting the first terminal and the second terminal of the second transistor with each other; when the output loading is heavy load the control signal conducts the first transistor, and then the second transistor is cut-off for not conducting the first terminal and the second terminal of the second transistor with each other. 9. The intelligent pulse control circuit according to claim 8 , wherein when the second transistor is conducted the control unit turns off the power factor correction stage and the pulse width modulation stage according to the turn-off signal, such that the output voltage of the pulse width modulation stage is decreased, when the output voltage of the pulse width modulation stage is decreased to make the feedback be lower than the loading signal, the control signal conducts the first transistor for cutting off the second transistor. 10. The intelligent pulse control circuit according to claim 7 , further comprising: a start unit, coupled between the control terminal of the second transistor and the bias voltage, the start unit controlled by a start signal of the control unit, the start unit transmitting the bias voltage to the control terminal of the second transistor when a control terminal of the start unit receives the start signal. 11. The intelligent pulse control circuit according to claim 7 , wherein the turn-off signal is a high voltage level. 12. The intelligent pulse control circuit according to claim 6 , wherein the switch unit comprises: a first transistor, a control terminal of the first transistor coupled to the output terminal of the operational amplifier for receiving the control signal, a first terminal of the first transistor coupled to a ground; and a second transistor, a control terminal of the second transistor coupled to a second terminal of the first transistor and a bias voltage, a first terminal of the second transistor coupled to the ground, a second terminal of the second transistor receiving the pulse width modulation signal.

Assignees

Inventors

Classifications

  • H02M1/4208Primary

    Arrangements for improving power factor of AC input · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Control circuits allowing low power mode operation, e.g. in standby mode · CPC title

  • Plural converter units in cascade (push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826) · CPC title

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What does patent US9601989B2 cover?
The instant disclosure provides an intelligent pulse control circuit used for a power supply. The intelligent pulse control circuit comprises a control unit, a buffer unit, a comparing unit and a switch unit. The buffer receives a loading signal. The comparing unit is coupled to the buffer unit, receives the loading signal generated according to the current of the output loading, and compares t…
Who is the assignee on this patent?
Lite On Electronics Guangzhou Ltd, Lite On Technology Corp
What technology area does this patent fall under?
Primary CPC classification H02M1/4208. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).