Flexible display

Patent metadata

Field	Value
Publication number	US-9601557-B2
Application number	US-201313837311-A
Country	US
Kind code	B2
Filing date	Mar 15, 2013
Priority date	Nov 16, 2012
Publication date	Mar 21, 2017
Grant date	Mar 21, 2017

Abstract

A flexible display having an array of pixels or sub-pixels is provided. The display includes a flexible substrate and an array of thin film transistors (TFTs) corresponding to the array of pixels or sub-pixels on the substrate. The display also includes a first plurality of metal lines coupled to gate electrodes of the TFTs and a second plurality of metal lines coupled to source electrodes and drain electrodes of the TFTs. At least one of the first plurality of metal lines and the second plurality of metal lines comprises a non-stretchable portion in the TFT areas and a stretchable portion outside the TFT areas.

First claim

What is claimed is:

1. A flexible display having an array of pixels in an active area of the display that emits light to display images to a user, the flexible display comprising:
a flexible substrate;
an array of thin film transistors corresponding to the array of pixels on the flexible substrate;
a first plurality of metal lines coupled to gate electrodes of the thin film transistors; and
a second plurality of metal lines coupled to source-drain electrodes of the thin film transistors, wherein a line in the first plurality of metal lines comprises a stretchable portion that overlaps a first line in the second plurality of metal lines and comprises a straight portion that overlaps a second line in the second plurality of metal lines, wherein an area of overlap between the stretchable portion and the first line and an area of overlap between the straight portion and the second line are the same, and wherein the stretchable portion of the line overlaps the active area of the display that emits the light to display the images to the user.

2. The flexible display of claim 1 , wherein the stretchable portion is shaped in a pattern configured to be bendable.

3. The flexible display of claim 2 , wherein the pattern comprises at least one pattern selected from the group consisting of a serpentine pattern, a sine wave pattern, and a square wave pattern.

4. The flexible display of claim 1 , wherein the pixels comprise organic light emitting diodes.

5. The flexible display of claim 1 , further comprising a buffer layer between the substrate and the thin film transistors.

6. The flexible display of claim 5 , further comprising an active semiconductor layer over the buffer layer and a gate insulator over the active semiconductor layer, wherein the gate electrodes are disposed over the gate insulator.

7. The flexible display of claim 6 , wherein the active semiconductor layer comprises a material selected from the group consisting of amorphous silicon, low temperature polysilicon, and metal oxide.

8. The flexible display of claim 5 , wherein the buffer layer comprises a sublayer of silicon oxide and a sublayer of silicon nitride, wherein the silicon nitride comprises striations between the thin film transistors in the array of thin film transistors.

9. The flexible display of claim 5 , wherein the buffer layer comprises a sublayer of silicon oxide and a sublayer of silicon nitride, wherein the silicon nitride comprises a first portion formed beneath at least one thin film transistor in the array of thin film transistors and a second portion that is not formed beneath the at least one thin film transistor, wherein the first portion is thicker than the second portion.

10. The flexible display of claim 1 , further comprising an interlayer dielectric between the gate electrodes of the thin film transistors and the source-drain electrodes of the thin film transistors.

11. The flexible display of claim 10 , wherein the interlayer dielectric comprises a sublayer of silicon oxide and a sublayer of silicon nitride, and wherein the silicon nitride comprises a striation pattern between the thin film transistors in the array of thin film transistors.

12. The flexible display of claim 10 , wherein the interlayer dielectric overlaps at least some of the thin film transistors in the array of thin film transistors and is absent between at least some of the thin film transistors in the array of thin film transistors.

13. The flexible display of claim 1 , further comprising a passivation layer disposed over the source-drain electrodes of the thin film transistors.

14. The flexible display of claim 13 , wherein the passivation layer comprises a flexible organic material.

15. The flexible display of claim 1 , wherein the flexible substrate comprises polyimide.

16. The flexible display of claim 1 , wherein the stretchable portion is formed from first and second overlapping metal traces, and wherein the first metal trace is electrically shorted to the second metal trace.

17. The flexible display of claim 16 , wherein the first metal trace comprises a first stretchable portion that is formed from a first metal layer that forms the gate electrodes, and wherein the second metal trace comprises a second stretchable portion that is formed from a second metal layer that forms the source-drain electrodes.

18. The flexible display of claim 17 , wherein the first stretchable portion is electrically shorted to the second stretchable portion in at least one location between the thin film transistors in the array of thin film transistors.

19. A flexible display having an array of pixels, the flexible display comprising:
a flexible substrate;
a buffer layer over the flexible substrate;
an array of thin film transistors corresponding to the array of pixels on the flexible substrate;
a first plurality of metal lines coupled to gate electrodes of the thin-film transistors;
a second plurality of metal lines coupled to source-drain electrodes of the thin-film transistors;
an integrated circuit that is outside the array of thin-film transistors and the array of pixels; and
a plurality of metal traces coupled between the thin-film transistors and the integrated circuit, the plurality of metal traces being formed of at least one of a first metal layer that forms the gate electrodes of the thin-film transistors and a second metal layer that forms the source-drain electrodes of the thin-film transistors, wherein the plurality of metal traces is disposed over the buffer layer; and
a gate insulator layer interposed between the first metal layer and the buffer layer, wherein the buffer layer comprises first and second sublayers, wherein the first sublayer comprises a plurality of gaps and is interposed between the second sublayer and the flexible substrate, and wherein the second sublayer is formed in the gaps to form striations in the buffer layer.

20. The flexible display of claim 19 , wherein the plurality of metal traces are configured to be stretchable.

21. The flexible display of claim 19 , wherein at least one of the first plurality of metal lines and the second plurality of metal lines comprises a non-stretchable portion that at least partially overlaps a thin-film transistor in the array of thin-film transistors and a stretchable portion that does not overlap the thin-film transistor in the array of thin-film transistors.

22. The flexible display of claim 21 , wherein the stretchable portion comprises a metal trace shaped in a pattern configured to be bendable.

23. The flexible display of claim 22 , wherein the pattern comprises at least one pattern selected from the group consisting of a serpentine pattern, a sine wave pattern, and a square wave pattern.

24. The flexible display of claim 19 , wherein the pixels comprise organic light emitting diodes.

25. The flexible display of claim 19 , wherein the second sublayer comprises silicon oxide and the first sublayer comprises silicon nitride, and wherein the striations are formed between the array of pixels and the integrated circuit.

26. The flexible display of claim 19 , wherein the second sublayer comprises silicon oxide and the first sublayer comprises silicon nitride, wherein the silicon nitride comprises a first portion formed beneath at least one thin-film transistor in the array of thin-film transistors and a second portion that is not formed beneath the at least one thin-film transistor, an

Assignees

• Apple Inc

Inventors

• Yang Byung Duk
• Zhong John Z
• Chang Shih Chang
• Gupta Vasudha
• Park Young Bae

Classifications

• H01L27/1218

  Electricity · mapped topic

• H01L27/124

  Electricity · mapped topic

• H01L27/1248

  Electricity · mapped topic

• H01L2251/5338

  Electricity · mapped topic

• H01L27/1244

  Electricity · mapped topic