Pixel circuit, organic electroluminesce display panel and display device

US9601057B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9601057-B2
Application numberUS-201615167863-A
CountryUS
Kind codeB2
Filing dateMay 27, 2016
Priority dateJun 9, 2014
Publication dateMar 21, 2017
Grant dateMar 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A pixel circuit, an organic electroluminescent display panel and a display device are provided. The pixel circuit includes a light emitting element, a first capacitor, a reset control module, a drive control module, a compensation control module, and a light emission control module. In a reset phase, the reset control module writes a reset signal at a reset signal end into a second end of the first capacitor. In a compensation phase, the reset control module writes a data signal at a data signal end into a first end of the first capacitor, and the drive control module charges the first capacitor through the compensation control module. In a light emission phase, both the light emission control module and the first capacitor enable the drive control module to drive the light emitting element with a stable current for emission of light.

First claim

Opening claim text (preview).

What is claimed is: 1. A pixel circuit comprising: a light emitting element, a first capacitor, a reset control module, a drive control module, a compensation control module, and a light emission control module, wherein: a first signal end of the reset control module is connected with a data signal end, a second signal end of the reset control module is connected with a reset control signal end, and a third signal end of the reset control module is connected respectively with a first end of the first capacitor and a first signal end of the light emission control module; and a fourth signal end of the reset control module is connected with a first scan signal end, a fifth signal end of the reset control module is connected with a reset signal end, and a sixth signal end of the reset control module is connected respectively with a second end of the first capacitor, a first signal end of the compensation control module and a first signal end of the drive control module; a second signal end of the drive control module is connected with a first reference signal end, and a third signal end of the drive control module is connected respectively with a second signal end of the compensation control module and a second signal end of the light emission control module; and a third signal end of the compensation control module is connected with a second scan signal end, wherein reset control signal end and the second scan signal end are not connected to a common signal end; a third signal end of the light emission control module is connected with a light emission control signal end, a fourth signal end of the light emission control module is connected with a second reference signal end, and a fifth signal end of the light emission control module is connected with a first end of the light emitting element; and a second end of the light emitting element is connected with a third reference signal end; in a reset phase, the reset control module provides a data signal transmitted from the data signal end to the first end of the first capacitor under control of the reset control signal end, and the reset control module provides a reset signal transmitted from the reset signal end into the second end of the first capacitor under control of the first scan signal end; in a compensation phase, the drive control module charges the first capacitor through the compensation control module under control of the second scan signal end; wherein the compensation control module comprises a first switch transistor having a gate connected with the second scan signal end, a source connected with the third signal end of the drive control module, and a drain connected with the second end of the first capacitor; wherein the first switch transistor is turned off in the reset phase, and the first switch transistor is turned on in the compensation phase. 2. The pixel circuit according to claim 1 , wherein in a light emission phase, both the light emission control module and the first capacitor control the drive control module to drive the light emitting element to emit light under control of the light emission control signal end. 3. The pixel circuit according to claim 1 , wherein the reset signal end is the first scan signal end or the second reference signal end. 4. The pixel circuit according to claim 1 , wherein the drive control module comprises a drive transistor having a gate being the first signal end of the drive control module, a source being the second signal end of the drive control module, and a drain being the third signal end of the drive control module. 5. The pixel circuit according to claim 4 , wherein the drive transistor is a P-type transistor, a voltage at the first reference signal end is a positive voltage, and a voltage at the third reference signal end is lower than the voltage at the first reference signal end. 6. The pixel circuit according to claim 5 , wherein the reset control module comprises a second switch transistor and a third switch transistor, the second switch transistor having a gate connected with the reset control signal end, a source connected with the data signal end, and a drain connected with the first end of the first capacitor, and the third switch transistor having a gate connected with the first scan signal end, a source connected with the reset signal end, and a drain connected with the second end of the first capacitor. 7. The pixel circuit according to claim 6 , wherein all of the first switch transistor, the second switch transistor, and the third switch transistor are P-type transistors or N-type transistors. 8. The pixel circuit according to claim 5 , wherein the light emission control module comprises a fourth switch transistor and a fifth switch transistor, wherein: both a gate of the fourth switch transistor and a gate of the fifth switch transistor are connected with the light emission control signal end, a source of the fourth switch transistor is connected with the second reference signal end, and a drain of the fourth switch transistor is connected with the first end of the first capacitor; and a source of the fifth switch transistor is connected with the drain of the drive transistor, and a drain of the fifth switch transistor is connected with the first end of the light emitting element. 9. The pixel circuit according to claim 4 wherein the pixel circuit further comprises a second capacitor, wherein: a first end of the second capacitor is connected with the first reference signal end, and a second end of the second capacitor is connected with the gate of the drive transistor. 10. A pixel circuit comprising: a light emitting element, a first capacitor, a drive transistor, a first switch element, a second switch element, a third switch element, a fourth switch element, and a fifth switch element, wherein: a source of the drive transistor is connected with a first reference signal end, a drain of the drive transistor is connected respectively with a signal input end of the first switch element and a signal input end of the fifth switch element, and a gate of the drive transistor is connected respectively with a second end of the first capacitor, a signal output end of the third switch element and a signal output end of the first switch element; and a control end of the first switch element is connected with a second scan signal end; a signal input end of the second switch element is connected with a data signal end, a signal output end of the second switch element is connected respectively with a first end of the first capacitor and a signal output end of the fourth switch element, and a control end of the second switch element is connected with a reset control signal end, wherein reset control signal end and the second scan signal end are not connected to a common signal end; a signal input end of the third switch element is connected with a reset signal end, and a control end of the third switch element is connected with a first scan signal end; a signal input end of the fourth switch element is connected with a second reference signal end, and a control end of the fourth switch element is connected respectively with a control end of the fifth switch element and a light emission control signal end; and a first end of the light emitting element is connected with a signal output end of the fifth switch element, and a second end of the light emitting element is connected with a third reference signal end; in a reset phase, the second switch element provides a data signal transmitted from the data signal end to the first end of the first capacitor under control of the reset control signal end, and the third switch element provides a reset signal transmitted from the reset signal end into the second end

Assignees

Inventors

Classifications

  • G09G3/3233Primary

    with pixel circuitry controlling the current through the light-emitting element · CPC title

  • Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title

  • Waveforms for resetting a plurality of scan lines at a time · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

  • G09G3/3258Primary

    with pixel circuitry controlling the voltage across the light-emitting element · CPC title

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What does patent US9601057B2 cover?
A pixel circuit, an organic electroluminescent display panel and a display device are provided. The pixel circuit includes a light emitting element, a first capacitor, a reset control module, a drive control module, a compensation control module, and a light emission control module. In a reset phase, the reset control module writes a reset signal at a reset signal end into a second end of the f…
Who is the assignee on this patent?
Shanghai Tianma Am-Oled Co Ltd, Tianma Microelectronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3233. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).