Information processing apparatus that computes power consumption for CPU command

Patent metadata

Field	Value
Publication number	US-9600388-B2
Application number	US-201214365877-A
Country	US
Kind code	B2
Filing date	Dec 17, 2012
Priority date	Jan 31, 2012
Publication date	Mar 21, 2017
Grant date	Mar 21, 2017

Abstract

An information processing apparatus includes a hardware processor and a memory storing executable instructions that, when executed by the processor, cause the processor to extract a command from a command cache, complete a process by the command utilizing a predetermined method, input information, which indicates a final result of the process, onto a writing stage when the process by the command has been completed, compute, when operation of information input onto an execution stage for execution of the process by the command has been completed, power consumption required to execute the command stored in the execution stage in accordance with a status of a CPU (central processing unit) or a status of pertained parts around the CPU, and add, when operation of information input onto the writing stage has been completed, the computed power consumption to a current value of a power accumulating register that is a software visible register, so as to obtain accumulated power consumption.

First claim

The invention claimed is:

1. An information processing apparatus comprising:
a hardware processor including:
a logic device that extracts a command from a command cache;
a logic device that completes a process by the command utilizing a predetermined method;
a logic device that inputs information, which indicates a final result of the process, onto a writing stage when the process by the command has been completed;
a logic device that computes, when operation of information input onto an execution stage for execution of the process by the command has been completed, power consumption required to execute the command stored in the execution stage in accordance with a status of a CPU (central processing unit) or a status of pertained parts around the CPU;
a logic device that adds, when operation of information input onto the writing stage has been completed, the computed power consumption to a current value of a power accumulating register that is a software visible register, so as to obtain accumulated power consumption;
a logic device that determines in consideration of an internal state of the CPU, effectiveness of the information that was input onto the writing stage and indicates the final result of the process that is a pipe line process and inputs information that indicates a result of the determination into a predetermined internal register; and
a logic device that determines effectiveness of the power consumption to be accumulated in the power accumulating register based on the information that indicates said result of the determination and has been input onto the predetermined internal register; and inputs, if it is determined that the power consumption is effective, the accumulated power consumption into the power accumulating register.

2. The information processing apparatus in accordance with claim 1 , wherein:
possible types of the command include a command utilized to refer to the power accumulating register, a command utilized to reset the power accumulating register, and a command utilized to copy a content of the power accumulating register to another software visible register.

3. The information processing apparatus in accordance with claim 1 , wherein:
possible types of the pertained parts around the CPU include a bridge chip that supports operation of the CPU, a management chip, a power supply unit, and a sensor on a mother board.

4. A power consumption computation method for an information processing apparatus, wherein the method comprises:
extracting a command from a command cache;
completing a process by the command utilizing a predetermined method;
inputting information, which indicates a final result of the process, onto a writing stage when the process by the command has been completed;
computing, when operation of information input onto an execution stage for execution of the process by the command has been completed, power consumption required to execute the command stored in the execution stage in accordance with a status of a CPU (central processing unit) or a status of pertained parts around the CPU;
adding, when operation of information input onto the writing stage has been completed, the computed power consumption to a current value of a power accumulating register that is a software visible register, so as to obtain accumulated power consumption;
determining in consideration of an internal state of the CPU, effectiveness of the information that was input onto the writing stage and indicates the final result of the process that is a pipe line process;
inputting information that indicates a result of the determination into a predetermined internal register;
determining effectiveness of the power consumption to be accumulated in the power accumulating register based on the information that indicates said result of the determination and has been input onto the predetermined internal register; and
inputting, if it is determined that the power consumption is effective, the accumulated power consumption into the power accumulating register.

5. The power consumption computation method for the information processing apparatus in accordance with claim 4 , wherein:
possible types of the command include a command utilized to refer to the power accumulating register, a command utilized to reset the power accumulating register, and a command utilized to copy a content of the power accumulating register to another software visible register.

6. The power consumption computation method for the information processing apparatus in accordance with claim 4 , wherein:
possible types of the pertained parts around the CPU include a bridge chip that supports operation of the CPU, a management chip, a power supply unit, and a sensor on a mother board.

Assignees

• Takagi Hitoshi
• Nec Corp

Inventors

• Takagi Hitoshi

Classifications

• G06F11/328

  Computer systems status display (G06F11/327 takes precedence) · CPC title

• G06F11/3062 Primary

  where the monitored property is the power consumption (power management in a computing system G06F1/3203) · CPC title

• Y02B60/165

  Cross-Sectional Technologies · mapped topic

• G06F11/3466

  Performance evaluation by tracing or monitoring · CPC title

• G06F2201/865

  Monitoring of software · CPC title