Vertical hall element

US9599682B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9599682-B2
Application numberUS-201514943493-A
CountryUS
Kind codeB2
Filing dateNov 17, 2015
Priority dateNov 26, 2014
Publication dateMar 21, 2017
Grant dateMar 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a highly sensitive vertical Hall element without increasing a chip area. In the vertical Hall element, trenches each filled with an insulating film are formed between a first current supply end and voltage output ends, respectively, which enables the restriction of current flow into the voltage output ends to increase the ratio of a current component perpendicular to a substrate surface, resulting in enhanced sensitivity.

First claim

Opening claim text (preview).

What is claimed is: 1. A vertical Hall element, comprising: a semiconductor substrate; an n-type semiconductor layer formed on the semiconductor substrate; an n-type buried layer formed at a bottom of the n-type semiconductor layer; a first current supply end formed above the n-type buried layer; a pair of second current supply ends formed in a surface of the n-type semiconductor layer on both sides of the first current supply end to be symmetrical with respect to the first current supply end; a pair of voltage output ends formed in the surface of the n-type semiconductor layer on both sides of the first current supply end to be symmetrical with respect to the first current supply end so that a line connecting the pair of voltage output ends is perpendicular to a line connecting the pair of second current supply ends; and trenches formed in the n-type semiconductor layer between the first current supply end and one of the pair of voltage output ends and between the first current supply end and another of the pair of voltage output ends, respectively, each of the trenches being filled with an insulating film. 2. A vertical Hall element according to claim 1 , wherein the trenches surround at least part of the pair of voltage output ends, respectively. 3. A vertical Hall element according to claim 1 , wherein the trenches completely surround the pair of voltage output ends, respectively. 4. A vertical Hall element according to claim 1 , wherein the trenches have a depth that is equal to or larger than a diffusion depth of the pair of voltage output ends. 5. A vertical Hall element according to claim 1 , wherein the pair of voltage output ends have a depth that is larger than a diffusion depth of the first current supply end. 6. A vertical Hall element according to claim 1 , wherein the pair of voltage output ends have a depth that is equal to or smaller than a diffusion depth of the first current supply end. 7. A vertical Hall element, comprising: a semiconductor substrate; an n-type semiconductor layer formed on the n-type semiconductor substrate; an n-type buried layer formed at a bottom of the n-type semiconductor layer; a first current supply end formed above the n-type buried layer; a pair of second current supply ends formed in a surface of the n-type semiconductor layer on both sides of the first current supply end to be symmetrical with respect to the first current supply end; a pair of voltage output ends formed in the surface of the n-type semiconductor layer on both sides of the first current supply end to be symmetrical with respect to the first current supply end so that a line connecting the pair of voltage output ends is perpendicular to a line connecting the pair of second current supply ends; and field insulating films formed in the n-type semiconductor layer between the first current supply end and one of the pair of voltage output ends and between the first current supply end and another of the pair of voltage output ends, respectively. 8. A vertical Hall element according to claim 7 , wherein the field insulating films surround at least part of the pair of voltage output ends, respectively. 9. A vertical Hall element according to claim 7 , wherein the field insulating films completely surround the pair of voltage output ends, respectively. 10. A vertical Hall element according to claim 7 , wherein the field insulating films have a depth that is equal to or larger than a diffusion depth of the pair of voltage output ends. 11. A vertical Hall element according to claim 7 , wherein the pair of voltage output ends have a depth that is larger than a diffusion depth of the first current supply end. 12. A vertical Hall element according to claim 7 , wherein the pair of voltage output ends have a depth that is equal to or smaller than a diffusion depth of the first current supply end. 13. A vertical Hall element, comprising: a semiconductor substrate; an n-type semiconductor layer formed on the semiconductor substrate; an n-type buried layer formed at a bottom of the n-type semiconductor layer; a first current supply end formed above the n-type buried layer; a pair of second current supply ends formed in a surface of the n-type semiconductor layer on both sides of the first current supply end to be symmetrical with respect to the first current supply end; a pair of voltage output ends formed in the surface of the n-type semiconductor layer on both sides of the first current supply end to be symmetrical with respect to the first current supply end so that a line connecting the pair of voltage output ends is perpendicular to a line connecting the pair of second current supply ends; and p-type diffusion layers formed in the n-type semiconductor layer between the first current supply end and one of the pair of voltage output ends and between the first current supply end and another of the pair of voltage output ends, respectively. 14. A vertical Hall element according to claim 13 , wherein the p-type diffusion layers surround at least part of the pair of voltage output ends, respectively. 15. A vertical Hall element according to claim 13 , wherein the p-type diffusion layers completely surround the pair of voltage output ends, respectively. 16. A vertical Hall element according to claim 13 , wherein the p-type diffusion layers have a depth that is larger than a diffusion depth of the pair of voltage output ends. 17. A vertical Hall element according to claim 13 , wherein the pair of voltage output ends have a depth that is larger than a diffusion depth of the first current supply end. 18. A vertical Hall element according to claim 13 , wherein the pair of voltage output ends have a depth that is equal to or smaller than a diffusion depth of the first current supply end.

Assignees

Inventors

Classifications

  • Hall effect devices · CPC title

  • G01R33/077Primary

    Vertical Hall-effect devices · CPC title

  • Hall devices configured for spinning current measurements · CPC title

  • Constructional adaptation of the sensor to specific applications · CPC title

  • Electricity · mapped topic

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What does patent US9599682B2 cover?
Provided is a highly sensitive vertical Hall element without increasing a chip area. In the vertical Hall element, trenches each filled with an insulating film are formed between a first current supply end and voltage output ends, respectively, which enables the restriction of current flow into the voltage output ends to increase the ratio of a current component perpendicular to a substrate sur…
Who is the assignee on this patent?
Seiko Instr Inc, Sii Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification G01R33/077. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).