Reciprocal quantum logic comparator for qubit readout

Patent metadata

Field	Value
Publication number	US-9595969-B2
Application number	US-201615008022-A
Country	US
Kind code	B2
Filing date	Jan 27, 2016
Priority date	Mar 10, 2014
Publication date	Mar 14, 2017
Grant date	Mar 14, 2017

Abstract

One aspect of the present invention includes a reciprocal quantum logic (RQL) readout system. The system includes an input stage on which a read pulse is provided and an output stage configured to propagate an output pulse. The system also includes an RQL comparator comprising a first Josephson junction and a second Josephson junction that are coupled to a qubit. A bias current switches between a first Josephson junction in a first quantum state of the qubit and a second Josephson junction in a second quantum state of the qubit. The first Josephson junction triggers to provide the output pulse on the output stage in the first quantum state in response to the read pulse and the second Josephson junction triggers to provide no output pulse on the output stage in the second quantum state in response to the read pulse.

First claim

What is claimed is:

1. A readout system configured to read a quantum state of a qubit, the readout system comprising:
an input stage on which a read pulse is provided;
an output stage; and
a comparator circuit coupled to the qubit and comprising a first Josephson junction and a second Josephson junction, the comparator circuit being configured to provide an output pulse on the output stage in response to the read pulse to indicate a first quantum state of the qubit based on a bias current flowing through the first and second Josephson junctions in a first direction, and to not provide the output pulse on the output stage in response to the read pulse to indicate a second quantum state of the qubit based on the bias current flowing through the first and second Josephson junctions in a second direction.

2. The system of claim 1 , wherein the comparator circuit is configured to provide output pulse on the output stage in response to the read pulse to indicate the first quantum state of the qubit and to not provide the output pulse on the output stage in response to the read pulse to indicate the second quantum state of the qubit based on the bias current provided to the comparator circuit having a characteristic that corresponds to one of the first and second quantum states of the qubit.

3. The system of claim 2 , wherein the characteristic of the bias current is current direction, such that the bias current has a first current direction based on the first quantum state of the qubit and has a second current direction opposite the first current direction based on the second quantum state of the qubit.

4. The system of claim 2 , wherein the comparator circuit comprises the first Josephson junction and the second Josephson junction that are coupled to the output stage, such that the read pulse triggers the first Josephson junction to provide the output pulse on the output stage in response to the bias current based on the first quantum state of the qubit, and such that the read pulse triggers the second Josephson junction to provide no output pulse on the output stage in response to the bias current based on the second quantum state of the qubit.

5. The system of claim 1 , further comprising an RQL clock configured to generate an RQL clock signal configured to propagate the read pulse through the input stage, to activate the comparator circuit in response to the read pulse, and to propagate the output pulse through the output stage in response to indication of the first quantum state of the qubit.

6. The system of claim 5 , wherein the RQL clock signal is provided to the input stage, the output stage, and the comparator circuit in a symmetrical manner, and wherein the qubit is substantially isolated from the RQL clock signal via at least one inductive coupling.

7. The system of claim 1 , wherein the qubit is inductively coupled to the comparator circuit to generate the bias current, wherein the bias current is provided to change a relative threshold associated with each of the first and second Josephson junctions with respect to the read pulse.

8. The system of claim 7 , wherein the bias current through the first Josephson junction in the first direction is added to the read pulse to trigger the first Josephson junction to generate the output pulse and the bias current through the second Josephson junction in the first direction is subtracted from the read pulse to prevent the second Josephson junction from triggering, and wherein the bias current through the first Josephson junction in the second direction is subtracted from the read pulse to prevent triggering of the first Josephson junction and the bias current through the second Josephson junction in the second direction is added to the read pulse to trigger the second Josephson junction.

9. The system of claim 7 , wherein the comparator circuit further comprises a third Josephson junction and a fourth Josephson junction, wherein the first and second Josephson junctions are coupled to the output stage and wherein the third and fourth Josephson junctions are coupled to the input stage to substantially balance the comparator circuit, and wherein the qubit is inductively coupled to the input stage and to the output stage to generate the bias current through the first, second, third, and fourth Josephson junctions in a first direction in the first quantum state and in a second direction in the second quantum state.

10. The system of claim 1 , wherein the comparator circuit comprises a shunt resistor that symmetrically interconnects an RQL clock signal and the comparator circuit, such that the shunt resistor is symmetrically arranged with respect to the qubit.

11. A method for reading a quantum state of a phase qubit, the method comprising:
providing a bias current in a first direction in response to a first quantum state of the phase qubit and in a second direction in response to a second quantum state of the phase qubit;
applying a read pulse on an input stage;
providing an output pulse from a comparator circuit to an output stage in response to the read pulse based on the bias current being provided in the first direction; and
not providing the output pulse from the comparator circuit to the output stage in response to the read pulse based on the bias current being provided in the second direction.

12. The method of claim 11 , wherein providing the bias current comprises providing the bias current through each of a first Josephson junction and a second Josephson junction in first respective directions in a first quantum state of the phase qubit and in second respective directions in a second quantum state of the phase qubit, wherein determining that the phase qubit is in the first quantum state comprises determining that the phase qubit is in the first quantum state in response to the first Josephson junction triggering based on the bias current being provided in the first direction through the first Josephson junction, and wherein determining that the phase qubit is in the second quantum state comprises determining that the phase qubit is in the second quantum state in response to the second Josephson junction triggering based on the bias current being provided in the second direction through the second Josephson junction.

13. The method of claim 12 , wherein providing the bias current comprises:
providing the bias current in the first direction to decrease a threshold of the first Josephson junction relative to the second Josephson junction; and
providing the bias current in the second direction to decrease a threshold of the second Josephson junction relative to the first Josephson junction.

14. The method of claim 11 , further comprising:
providing an RQL clock signal to the input stage to facilitate triggering of at least one input Josephson junction to propagate the read pulse;
providing the RQL clock signal to the output stage to facilitate triggering of at least one output Josephson junction to propagate the output pulse in response to the read pulse in the first quantum state of the phase qubit; and
providing the RQL clock signal to the RQL comparator to facilitate triggering of at least one Josephson junction in response to the read pulse to provide or to not provide the output pulse based on the respective one of the first and second quantum states of the phase qubit.

15. The method of claim 11 , wherein providing the bias current comprises providing the bias current based on an inductive coupling of the phase qubit to the comparator circuit.

16. A reciprocal quantum logic (RQL) readout system configured to read a quantum state of a qubit, the

Assignees

• Miller Donald L
• Naaman Ofer
• Northrop Grumman Systems Corp

Inventors

• Miller Donald L
• Naaman Ofer

Classifications

• H03K3/38

  by the use, as active elements, of superconductive devices · CPC title

• G11C11/44

  using super-conductive elements, e.g. cryotron · CPC title

• H03K19/195 Primary

  using superconductive devices · CPC title

• G06N99/002

  Physics · mapped topic

• H01L39/223

  Electricity · mapped topic