Defect classification using topographical attributes

Patent metadata

Field	Value
Publication number	US-9595091-B2
Application number	US-201213451490-A
Country	US
Kind code	B2
Filing date	Apr 19, 2012
Priority date	Apr 19, 2012
Publication date	Mar 14, 2017
Grant date	Mar 14, 2017

Abstract

A method for classification includes receiving an image of an area of a semiconductor wafer on which a pattern has been formed, the area containing a location of interest. At least one value for one or more attributes of the location of interest are computed based upon topographical features of the location of interest in a three-dimensional (3D) map of the area.

First claim

What is claimed is:

1. A method for classification, comprising:
receiving, by a processing device, a three-dimensional (3D) map of an area of a semiconductor wafer containing a location of interest;
generating a 3D shape corresponding to the location of interest based on a fitting of the 3D shape using a polynomial equation to the location of interest, and wherein the 3D shape that is fitted using the polynomial equation expresses a plane component that is used to measure a slope of a topographical surface of the 3D shape in a first direction and another slope of the topographical surface of the 3D shape in a second direction;
computing, by the processing device, a value for an attribute of the location of interest based on the topographical surface of the 3D shape that is fitted to the location of interest; and
classifying a defect corresponding to the location of interest on the semiconductor wafer based on the value that is computed based on the topographical surface of the 3D shape that is fitted to the location of interest.

2. The method of claim 1 , wherein the location of interest contains a feature, wherein the feature is selected from a plurality of features, the plurality of features comprising a defect, a process variation, and a design of interest.

3. The method of claim 1 , wherein receiving the 3D map comprises deriving the 3D map from images captured by a scanning electron microscope (SEM).

4. The method of claim 1 , wherein computing the value comprises calculating a 3D shape parameter of the location of interest.

5. The method of claim 4 , wherein calculating the 3D shape parameter comprises:
fitting the 3D shape as a parametric surface to the location of interest in the 3D map; and
deriving the 3D shape parameter from the fitted surface.

6. The method of claim 4 , wherein calculating the 3D shape parameter comprises finding an orientation of a plane corresponding to a surface of the location of interest.

7. The method of claim 4 , wherein calculating the 3D shape parameter comprises finding a measure of curvature of a surface of the location of interest.

8. The method of claim 1 , wherein computing the value comprises calculating a texture parameter of the location of interest.

9. The method of claim 8 , wherein calculating the texture parameter comprises:
computing a gradient over a surface of the location of interest; and
finding a measure of roughness of the surface based on the gradient.

10. The method of claim 8 , wherein calculating the texture parameter comprises computing a directional order of a plurality of edges in the location of interest.

11. The method of claim 1 , wherein the polynomial equation corresponds to Legendre polynomials, and wherein the 3D shape further expresses an integral non-planarity component and a local non-planarity component, and wherein the integral non-planarity component is used to measure a topographical shape of the 3D shape, and the local non-planarity component is used to measure a texture associated with the 3D shape.

12. An apparatus comprising:
a memory; and
a processor coupled with the memory, wherein the processor is to:
receive a three-dimensional (3D) map of an area of a semiconductor wafer containing a location of interest;
generate a 3D shape corresponding to the location of interest based on a fitting of the 3D shape using a polynomial equation to the location of interest, and wherein the 3D shape that is fitted using the polynomial equation expresses a plane component that is used to measure a slope of a topographical surface of the 3D shape in a first direction and another slope of the topographical surface of the 3D shape in a second direction;
compute a value for an attribute of the location of interest based on a topographical surface of the 3D shape that is fitted to the location of interest; and
classify a defect corresponding to the location of interest on the semiconductor wafer based on the value that is computed based on the topographical surface of the 3D shape that is fitted to the location of interest.

13. The apparatus of claim 12 , wherein the location of interest comprises a feature, wherein the feature is selected from a plurality of features, the plurality of features comprising a defect, a process variation, and a design of interest.

14. The apparatus of claim 12 , wherein the 3D map is derived from a plurality of images captured by a scanning electron microscope (SEM).

15. The apparatus of claim 12 , wherein the value comprises a 3D shape parameter of the location of interest.

16. The apparatus of claim 15 , wherein the processor is to compute the 3D shape parameter by:
fitting the 3D shape as a parametric surface to the location of interest in the map; and
deriving the 3D shape parameter from the fitted surface.

17. The apparatus of claim 15 , wherein the processor is further to compute the 3D shape parameter by finding an orientation of a plane corresponding to a surface of the location of interest.

18. The apparatus of claim 15 , wherein the 3D shape parameter comprises a measure of curvature of a surface of the location of interest.

19. The apparatus of claim 12 , wherein the value comprises a texture parameter of the location of interest.

20. The apparatus of claim 19 , wherein the processor is to calculate the texture parameter by:
computing a gradient over a surface of the location of interest; and
finding a measure of roughness of the surface responsively to the gradient.

21. The apparatus of claim 19 , wherein the processor is further to calculate the texture parameter by computing a directional order of edges in the location of interest.

22. The apparatus of claim 12 , wherein the polynomial equation corresponds to Legendre polynomials, and wherein the 3D shape further expresses an integral non-planarity component and a local non-planarity component, and wherein the integral non-planarity component is used to measure a topographical shape of the 3D shape, and the local non-planarity component is used to measure a texture associated with the 3D shape.

23. A non-transitory computer readable storage medium having instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
receiving a three-dimensional (3D) map of an area of a semiconductor wafer containing a location of interest;
generating a 3D shape corresponding to the location of interest based on a fitting of the 3D shape using a polynomial equation to the location of interest, and wherein the 3D shape that is fitted using the polynomial equation expresses a plane component that is used to measure a slope of a topographical surface of the 3D shape in a first direction and another slope of the topographical surface of the 3D shape in a second direction;
computing a value for an attribute of the location of interest based on a surface of the 3D shape that is fitted to the location of interest; and
classifying a defect corresponding to the location of interest on the semiconductor wafer based on the value that is computed based on the surface of the 3D shape that is fitted to the location of interest.

24. The non-transitory computer readable storage medium of claim 23 , wherein the location of interest comprises a feature, wherein the feature is selected from a plurality of features, the plurality of features comprising a defect, a process variation, and a design of interest.

25. The no

Assignees

• Kaizerman Idan
• Schwarzband Ishai
• Rozenman Efrat
• Applied Materials Israel Ltd

Inventors

• Kaizerman Idan
• Schwarzband Ishai
• Rozenman Efrat

Classifications

• G06T2207/10061

  from scanning electron microscope · CPC title

• G06T2207/30148

  Semiconductor; IC; Wafer · CPC title

• G06T7/0004 Primary

  Industrial image inspection · CPC title