Circuit arrangement having a fail-silent function

Patent metadata

Field	Value
Publication number	US-9594356-B2
Application number	US-201214110945-A
Country	US
Kind code	B2
Filing date	Mar 30, 2012
Priority date	Apr 11, 2011
Publication date	Mar 14, 2017
Grant date	Mar 14, 2017

Abstract

A circuit arrangement for a control device implements a fail-silent and/or fail-safe function, particularly with a hardware-realized detection of a fault or a faulty state in a microcontroller of the circuit arrangement. The circuit arrangement interrupts the communication of the control device with a communications network when a fault is detected.

First claim

The invention claimed is:

1. A circuit arrangement for a control device for implementing a fail-silent and/or fail-safe function, comprising:
a microcontroller comprising a hardware-realized monitoring device that is configured to detect faults in individual modules of the microcontroller and that has at least one output configured to provide a signal voltage to inform external components of detected faults, and
a bus driver that is configured to provide a bus communication of the control device with a bus network,
wherein:
the signal voltage is configured and adapted to control the bus driver so that the bus communication of the control device is interrupted when the monitoring device detects a fault,
a GPIO pin of the microcontroller is connected to an STB and/or EN pin of a host interface of the bus driver via an electronic switch,
the output of the monitoring device is connected to a control input of the electronic switch, and
in the event of the fault, a voltage level of the GPIO pin will be overridden by a suitable voltage level of the signal voltage applied from the output of the monitoring device to the control input of the electronic switch, whereby the STB and/or EN pin will be controlled such that the bus driver will interrupt the bus communication of the control device.

2. The circuit arrangement according to claim 1 , wherein:
the bus driver has a deactivation input by which the bus communication can be deactivated,
the output of the monitoring device is connected to the deactivation input, and
a particular voltage level of the signal voltage present at the output of the monitoring device in the event of the fault is configured and adapted to cause the bus driver to interrupt the bus communication of the control device.

3. The circuit arrangement according to claim 1 , wherein the bus driver comprises a CAN bus transceiver.

4. The circuit arrangement according to claim 1 , wherein the electronic switch comprises a transistor.

5. A control device comprising a circuit arrangement according to claim 1 incorporated in said control device.

6. A motor vehicle comprising a circuit arrangement according to claim 1 incorporated in said motor vehicle.

7. A circuit arrangement for a control device for implementing a fail-silent and/or fail-safe function, comprising:
a microcontroller comprising a hardware-realized′ monitoring device that is configured to detect faults in individual modules of the microcontroller and that has at least one output configured to provide a signal voltage to inform external components of detected faults, and
a bus driver that is configured to provide a bus communication of the control device with a bus network,
wherein:
the signal voltage is configured and adapted to control the bus driver so that the bus communication of the control device is interrupted when the monitoring device detects a fault,
the bus driver comprises a bus guardian interface with an input,
the output of the monitoring device is connected directly to the input of the bus guardian interface and the output of the monitoring device normally carries a high level of the signal voltage and carries a low level of the signal voltage in the event of the fault, or the output of the monitoring device is connected via an interposed inverter to the input of the bus guardian interface and the output of the monitoring device normally carries a low level of the signal voltage and carries a high level of the signal voltage in the event of the fault, and
the bus driver will interrupt the bus communication when the low level is present at the input of the bus guardian interface.

8. The circuit arrangement according to claim 7 , wherein the output of the monitoring device is connected directly to the input of the bus guardian interface and the output of the monitoring device normally carries the high level of the signal voltage and carries the low level of the signal voltage in the event of the fault.

9. The circuit arrangement according to claim 7 , wherein the output of the monitoring device is connected via the interposed inverter to the input of the bus guardian interface and the output of the monitoring device normally carries the low level of the signal voltage and carries the high level of the signal voltage in the event of the fault.

10. The circuit arrangement according to claim 9 , wherein the inverter comprises a transistor.

11. The circuit arrangement according to claim 7 , wherein the bus driver comprises a FlexRay bus transceiver.

12. A control device comprising a circuit arrangement according to claim 7 incorporated in said control device.

13. A motor vehicle comprising a circuit arrangement according to claim 7 incorporated in said motor vehicle.

Assignees

• Goepfert Christian
• Fritsche Peter
• Conti Temic Microelectronic Gmbh

Inventors

• Goepfert Christian
• Fritsche Peter

Classifications

• G06F11/0772

  Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers · CPC title

• G06F11/0739 Primary

  in a data processing system embedded in automotive or aircraft systems · CPC title

• G06F11/0793

  Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40) · CPC title

• G05B9/02 Primary

  electric · CPC title