Interconnectable ultrasound transducer probes and related methods and apparatus

US9592030B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9592030-B2
Application numberUS-201414337813-A
CountryUS
Kind codeB2
Filing dateJul 22, 2014
Priority dateJul 23, 2013
Publication dateMar 14, 2017
Grant dateMar 14, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Ultrasound devices and methods are described, including a repeatable ultrasound transducer probe having ultrasonic transducers and corresponding circuitry. The repeatable ultrasound transducer probe may be used individually or coupled with other instances of the repeatable ultrasound transducer probe to create a desired ultrasound device. The ultrasound devices may optionally be connected to various types of external devices to provide additional processing and image rendering functionality.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus, comprising: a substrate; a plurality of ultrasonic transducers on the substrate; control circuitry on the substrate, coupled to the plurality of ultrasonic transducers and configured to control operation of the plurality of ultrasonic transducers; a first interface, the first interface being of a first type; and a second interface, the second interface being of a second type, the first and second interfaces being individually configured to transfer electronic signals between the control circuitry and an external device. 2. The apparatus of claim 1 , wherein the first type of interface is a lower speed interface than the second type of interface. 3. The apparatus of claim 2 , wherein the apparatus comprises a third interface, the third interface being of the second type and being configured to transfer electronic signals between the control circuitry and the external device. 4. The apparatus of claim 3 , wherein the apparatus comprises in the range of four times to ten times as many interfaces of the second type as interfaces of the first type. 5. The apparatus of claim 2 , wherein the second interface is configured to operate at speeds greater than approximately 4 gigabits per second (Gbps). 6. The apparatus of claim 5 , wherein the second interface is configured to operate at speeds between approximately 4 Gbps and approximately 50 Gbps. 7. The apparatus of claim 1 , wherein the first interface and/or the second interface is/are formed on the substrate. 8. The apparatus of claim 1 , wherein the second interface is configured to interface with an external field programmable gate array (FPGA). 9. The apparatus of claim 1 , wherein the first interface is configured to interface with a consumer electronics device. 10. The apparatus of claim 9 , wherein the consumer electronics device is a tablet computer. 11. The apparatus of claim 9 , wherein the consumer electronics device is a smartphone. 12. The apparatus of claim 9 , wherein the consumer electronics device is a laptop computer. 13. The apparatus of claim 9 , wherein the second interface is incompatible with the consumer electronics device. 14. The apparatus of claim 1 , wherein the first interface is a universal serial bus (USB) interface. 15. The apparatus of claim 14 , wherein the second interface supports at least one of the following transmission protocols: 10 gigabit Ethernet, 40 gigabit Ethernet, 100 gigabit Ethernet, SONET, SerDes, PCI Express, Infiniband, JESD-204B, Thunderbolt, or HDMI. 16. The apparatus of claim 1 , further comprising a package configured to at least partially enclose the substrate. 17. The apparatus of claim 1 , wherein the first interface is configured to electrically couple to a first type of connector and wherein the second interface is configured to electrically couple to a second type of connector. 18. The apparatus of claim 17 , wherein the first and second types of connectors represent different types of cables. 19. The apparatus of claim 17 , wherein the first and second types of connectors represent different types of wireless connectors. 20. The apparatus of claim 1 , wherein at least a portion of the plurality of ultrasonic transducers are arranged on a first portion of the substrate and wherein at least a portion of the first interface and/or the second interface is/are arranged on a non-overlapping second portion of the substrate. 21. The apparatus of claim 20 , wherein all ultrasonic transducers of the apparatus are arranged on the first portion of the substrate. 22. The apparatus of claim 20 , wherein the first interface and/or the second interface is/are arranged on the second portion of the substrate. 23. The apparatus of claim 20 , wherein at least part of the control circuitry is arranged on the second portion of the substrate. 24. The apparatus of claim 1 , wherein the plurality of ultrasonic transducers constitutes a first plurality, and wherein the apparatus further comprises a second plurality of ultrasonic transducers on the substrate which is not coupled to the control circuitry. 25. An apparatus, comprising: a single substrate ultrasound-on-a-chip imaging device comprising multiple different interface types supporting different data transfer rates. 26. The apparatus of claim 25 , wherein at least two different interface types of the multiple different interface types are configured to interface with different types of external devices. 27. The apparatus of claim 25 , wherein the ultrasound-on-a-chip imaging device includes an arrangement of micromachined ultrasonic transducers and control circuitry coupled to the arrangement of micromachined ultrasonic transducers. 28. The apparatus of claim 25 , wherein the multiple different interface types include a first interface type and a second interface type, and wherein the first interface type is configured to support data transfer rates spanning a first range and the second interface type is configured to support data transfer rates spanning a second range at least partially overlapping with the first range. 29. An apparatus, comprising: a substrate including a plurality of ultrasound elements; a first interface of a first type on the substrate; and a second interface of a second type that is different than the first type on the substrate. 30. The apparatus of claim 29 , wherein the first type is characterized by a slower data rate than the second type. 31. An apparatus, comprising: a substrate; a plurality of ultrasonic transducers on the substrate; and control circuitry on the substrate, coupled to the plurality of ultrasonic transducers and configured to control operation of the plurality of ultrasonic transducers, wherein the control circuitry comprises a waveform generator coupled to at least one ultrasonic transducer of the plurality of ultrasonic transducers, the waveform generator being configurable to generate different kinds of waveforms. 32. The apparatus of claim 31 , wherein the waveform generator is configurable to generate one or more of an impulse, a continuous wave, a coded excitation, or a chirp waveform. 33. The apparatus of claim 32 , wherein the chirp waveform is a linear frequency modulation (LFM) chirp. 34. The apparatus of claim 31 , wherein the control circuitry comprises a plurality of waveform generators, each waveform generator of the plurality of waveform generators being coupled to a respective ultrasonic transducer of the plurality of ultrasonic transducers. 35. The apparatus of claim 31 , wherein the waveform generator is coupled to at least two ultrasonic transducers of the plurality of ultrasonic transducers. 36. The apparatus of claim 35 , wherein the control circuitry comprises a plurality of waveform generators, each waveform generator of the plurality of waveform generators being coupled to at least two ultrasonic transducers of the plurality of ultrasonic transducers. 37. The apparatus of claim 31 , wherein the waveform generator is configured to generate a first kind of waveform for a first ultrasonic transducer of the plurality of ultrasonic transducers and a second kind of waveform for a second ultrasonic transducer of the plurality of ult

Assignees

Inventors

Classifications

  • with multiple treatment transducers · CPC title

  • involving processing of raw data to produce diagnostic data, e.g. for generating an image · CPC title

  • A61B8/4444Primary

    related to the probe · CPC title

  • A61B8/4483Primary

    characterised by features of the ultrasound transducer · CPC title

  • Transmission of data between radar, sonar or lidar systems and remote stations · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9592030B2 cover?
Ultrasound devices and methods are described, including a repeatable ultrasound transducer probe having ultrasonic transducers and corresponding circuitry. The repeatable ultrasound transducer probe may be used individually or coupled with other instances of the repeatable ultrasound transducer probe to create a desired ultrasound device. The ultrasound devices may optionally be connected to va…
Who is the assignee on this patent?
Butterfly Network Inc
What technology area does this patent fall under?
Primary CPC classification A61B8/4444. Mapped technology areas include Human Necessities.
When was this patent published?
Publication date Tue Mar 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).