Programmable and high performance switch for data center networks

Patent metadata

Field	Value
Publication number	US-9590922-B2
Application number	US-201113106226-A
Country	US
Kind code	B2
Filing date	May 12, 2011
Priority date	May 12, 2011
Publication date	Mar 7, 2017
Grant date	Mar 7, 2017

Abstract

This application describes routing packets from a source server to a plurality of ports of a switch. The switch is programmed by the control server and is used to direct incoming data packets to one or more ports of the switch in a manner that reduces congestion of incoming data packets to a destination server. Further, the control server queries congestion information from the switch, and then sends congestion notification back to the source server to either increase or decrease the amount of data being sent to the destination server.

First claim

What is claimed is:

1. A method comprising:
storing a plurality of entries in a ternary content-addressable memory (TCAM) table on an Ethernet switching chip integrated into a control server, one or more entries of the plurality of entries comprising an index and two or more intermediate addresses, the one or more entries including an indication of a port on the Ethernet switching chip;
receiving, from a source server, a data packet at the control server;
extracting a key at the Ethernet switching chip from the data packet, the key comprising a key index and two or more key intermediate addresses;
comparing the key with at least one entry of the plurality of entries stored in the TCAM table;
determining, as a matched entry in the TCAM table, that the key index and at least one key intermediate address of the two or more key intermediate addresses match the at least one entry in the TCAM table;
collecting, by the control server, first congestion information representing a number of data packets waiting to be sent from the Ethernet switching chip and an amount of bandwidth available for sending one or more data packets from the Ethernet switching chip to a destination server;
based at least partly on the matched entry in the TCAM table, sending the data packet to a designated port of the Ethernet switching chip, the designated port being associated with the at least one entry of the TCAM table;
sending, by the control server, second congestion information to the source server, the second congestion information instructing the source server to reduce a rate of transmitting the data packets to the destination server, the second congestion information bypassing the Ethernet switching chip, the Ethernet switching chip integrated into the control server;
processing the data packet in a user space maintained by the control server or in a routing device driver in the control server based at least in part on one or more latency requirements for processing the data packet, the user space including at least one or more application programming interfaces for configuring the TCAM table; and
sending the data packet from the designated port to the destination server.

2. The method of claim 1 , wherein the key matches the at least one entry in the TCAM table when the key index and one of the two or more key intermediate addresses match the index and one of the two or more intermediate addresses.

3. The method of claim 1 , wherein an intermediate address of the one or more entries in the TCAM table comprises a value and a mask bit, the mask bit being selectively set to “care” or “don't care”.

4. The method of claim 3 , wherein the comparing the key and the at least one entry in the TCAM table includes comparing the index and the two or more intermediate addresses that include the mask bit that is set to “care”.

5. The method of claim 3 , wherein the comparing the key and the at least one entry in the TCAM table ignores the two or more intermediate addresses that include the mask bit that is set to “don't care”.

6. The method of claim 1 , wherein the control server provides a plurality of values being stored in the TCAM table.

7. The method of claim 1 , wherein the data packet includes an Ethernet packet header received at the Ethernet switching chip.

8. The method of claim 1 , wherein determining that the key index and at least one key intermediate address of the two or more key intermediate addresses match the at least one entry in the TCAM table comprises determining that the key index and the at least one key intermediate address match one entry of the plurality of entries in the TCAM table.

9. A system comprising:
one or more processors; and
memory coupled to the one or more processors, the memory including one or more modules that are executable by the one or more processors to perform operations of:
storing a plurality of entries in a ternary content-addressable memory (TCAM) table on an Ethernet switching chip integrated into a control server, one or more entries of the plurality of entries comprising an index and two or more intermediate addresses, the one or more entries including an indication of a port on the Ethernet switching chip;
receiving, from a source server, an incoming data packet at the control server;
extracting a key at the Ethernet switching chip from the incoming data packet, the key comprising a key index and two or more key intermediate addresses;
comparing the key with at least one entry of the plurality of entries stored in the TCAM table;
determining, as a matched entry in the TCAM table, that the key index and at least one key intermediate address of the two or more key intermediate addresses match the at least one entry in the TCAM table;
collecting first congestion information representing a number of data packets waiting to be sent from the Ethernet switching chip and an amount of bandwidth available for sending one or more data packets from the Ethernet switching chip;
based at least partly on the matched entry in the TCAM table, sending the incoming data packet to a designated port of the Ethernet switching chip, the designated port being associated with the matched entry in the TCAM table;
sending, by the control server, second congestion information to the source server, the second congestion information instructing the source server to reduce a rate of transmitting the data packets to a destination server, the second congestion information bypassing the Ethernet switching chip integrated into the control server;
processing the data packet in a user space maintained by the control server or in a routing device driver in the control server based at least in part on one or more latency requirements for processing the data packet, the user space including at least an application for programming the routing device driver; and
sending the incoming data packet from the designated port to the destination server.

10. The system of claim 9 , wherein the key matches the at least one entry in the TCAM table when the key index and one of the two or more key intermediate addresses match the index and one of the two or more intermediate addresses.

11. The system of claim 9 , wherein an intermediate address of the one or more entries in the TCAM table comprises a value and a mask bit, the mask bit being selectively set to “care” or “don't care”.

12. The system of claim 11 , wherein the comparing the key and the at least one entry in the TCAM table includes comparing the index and the two or more intermediate addresses that include the mask bit that is set to “care”.

13. The system of claim 11 , wherein the comparing the key and the at least one entry in the TCAM table ignores the two or more intermediate addresses that include the mask bit that is set to “don't care”.

14. The system of claim 9 , wherein the control server provides a plurality of values being stored in the TCAM table.

15. The system of claim 9 , wherein the incoming data packet includes an Ethernet packet header received at the Ethernet switching chip.

16. The system of claim 9 , wherein determining that the key index and at least one key intermediate address match the at least one entry in the TCAM table comprises determining that the key index and at least one key intermediate address match one entry of the plurality of entries in the TCAM table.

17. A system comprising:
an Ethernet switching chip integrated into a routing device, the Ethernet switching chip configured to:
store a plurality of entries in a ternary content-addressable memory (TCAM) table, one or more entries of the plura

Assignees

• Lv Guohan
• Guo Chuanxiong
• Xiong Yongqiang
• Wu Haitao
• Zhang Yongguang
• Microsoft Technology Licensing Llc

Inventors

• Lv Guohan
• Guo Chuanxiong
• Xiong Yongqiang
• Wu Haitao
• Zhang Yongguang

Classifications

• H04L45/7457

  Electricity · mapped topic

• H04L49/356 Primary

  for storage area networks · CPC title

• H04L49/506

  Backpressure · CPC title

• H04L45/74591

  using content-addressable memories [CAM] · CPC title