Digital pre-distortion for multiple-power amplifier transceivers
US-2024429953-A1 · Dec 26, 2024 · US
US9590665B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9590665-B2 |
| Application number | US-201514723957-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 28, 2015 |
| Priority date | May 28, 2014 |
| Publication date | Mar 7, 2017 |
| Grant date | Mar 7, 2017 |
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A transmitter in a wireless communication system is provided. The transmitter includes a baseband signal processor for detecting an envelope signal, a supply modulator (SM) for producing power to be supplied to a power amplifier using the detected envelope signal, and the power amplifier for receiving voltage from the SM and for amplifying power of a transmit signal. The SM generates a compensation signal corresponding to switching noise generated via switching amplification, and adds the compensation signal and the switching noise. The amplifier of the wireless communication system can produce low switching noise, and the envelope tracking power amplifier can prevent reception degradation due to the noise of the supply modulator.
Opening claim text (preview).
What is claimed is: 1. A device comprising: a supply modulator configured to: generate a switching signal comprising a compensation signal for switching noise generated via switching amplification based on a linear signal, wherein the linear signal is generated by amplifying an input envelope signal, and generate an output envelope signal by summing the switching signal and the linear signal; and a power amplifier configured to generate an output signal by amplifying the output envelope signal. 2. The device of claim 1 , further comprising: a baseband signal processor configured to detect the input envelope signal. 3. The device of claim 1 , wherein the supply modulator comprises: a linear amplifier configured to generate the linear signal by amplifying the input envelope signal; and a switching amplifier configured to generate the switching signal. 4. The device of claim 1 , wherein the supply modulator comprises a circuit for generating the compensation signal, and wherein the circuit comprises at least one a first element operating as a switch, a second element operating as an inverter, and a third element operating as a capacitor. 5. The device of claim 4 , wherein the supply modulator comprises a forth element operating a power inductor, and wherein the circuit is connected to the forth element in parallel. 6. The device of claim 4 , wherein the second element generates an anti-phase signal for the switching noise. 7. The device of claim 5 , wherein the third element has a compensation capacitance corresponding to a parasitic capacitance value for the forth element. 8. The device of claim 1 , wherein the compensation signal comprises a signal for compensating for a noise signal of the switching signal. 9. The device of claim 1 , wherein the compensation signal comprises an in-phase signal for the switching signal, if a value for a frequency band for the input envelope signal is lower than a predetermined threshold. 10. The device of claim 1 , wherein the compensation signal comprises an anti-phase signal for the switching signal, if a value for a frequency band for the input envelope signal is greater than a predetermined threshold. 11. The device of claim 1 , wherein the supply modulator comprises a circuit for generating the compensation signal, and wherein the circuit comprises a plurality of inverters and a plurality of capacitors. 12. The device of claim 11 , wherein the circuit comprises a plurality of path switches for building a path to generate the compensation signal through one of the inverters and one of the capacitors, and wherein each of the path switches is operated according to a calibration signal. 13. The device of claim 12 , wherein the calibration signal is at least one a predetermined signal stored in the device, a signal received from another device, and a signal generated in the circuit. 14. A method for operating a device, the method comprising: generating a switching signal comprising a compensation signal for switching noise generated via switching amplification based on a linear signal, wherein the linear signal is generated by amplifying an input envelope signal; generating an output envelope signal by summing the linear signal and the switching signal; and generating an output signal by amplifying the output envelope signal. 15. The method of claim 14 , further comprising: detecting the input envelope signal. 16. The method of claim 14 , further comprising: generating the linear signal by amplifying the input envelope signal. 17. The method of claim 14 , wherein the compensation signal is generated by a circuit included in the device, and wherein the circuit comprises at least one a first element operating as a switch, a second element operating as an inverter, and a third element operating as a capacitor. 18. The method of claim 17 , wherein a forth element operating as a power inductor is included in the device, and wherein the circuit is connected to the forth element in parallel. 19. The method of claim 17 , wherein the second element an anti-phase signal for the switching noise. 20. The method of claim 18 , wherein the third element has a compensation capacitance corresponding to a parasitic capacitance value for the forth element. 21. The method of claim 14 , wherein the compensation signal comprises a signal for compensating for a noise signal of the switching signal. 22. The method of claim 14 , wherein the compensation signal comprises an in-phase signal for the switching signal, if a value for a frequency band for the input envelope signal is lower than a predetermined threshold. 23. The method of claim 14 , wherein the compensation signal comprises an anti-phase signal for the switching signal, if a value for a frequency band for the input envelope signal is greater than a predetermined threshold. 24. The method of claim 14 , wherein compensation signal is generated by a circuit included in the device, and wherein the circuit comprises a plurality of inverters and a plurality of capacitors. 25. The method of claim 24 , wherein the circuit comprises a plurality of path switches for building a path to generate the compensation signal through one of the inverters and one of the capacitors, and wherein each of the path switches is operated according to a calibration signal. 26. The method of claim 25 , wherein the calibration signal is at least one a predetermined signal stored in the device, a signal received from another device, and a signal generated in the circuit.
the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not · CPC title
with semiconductor devices only · CPC title
using supply converters · CPC title
with power amplifiers · CPC title
Two or more amplifiers of different type are coupled in parallel at the input or output, e.g. a class D and a linear amplifier, a class B and a class A amplifier · CPC title
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