Apparatus and method for phase locked loop bandwidth expansion

US9590645B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9590645-B2
Application numberUS-201514816448-A
CountryUS
Kind codeB2
Filing dateAug 3, 2015
Priority dateFeb 21, 2012
Publication dateMar 7, 2017
Grant dateMar 7, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An apparatus for PLL bandwidth expansion including a compensation filter and a phase locked loop, where the compensation filter is programmed with a compensation function derived based on programmable coefficients and parameters of a transmitting device, a frequency response of the phase locked loop, and a wanted frequency response.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus for phase locked loop (“PLL”) bandwidth expansion comprising: a transmitting device including a programmable hardware compensation filter configured to receive a transmitted signal and output a filtered signal, and a PLL circuit installed in front of the compensation filter and configured to receive the filtered signal and output a modulated carrier signal, the programmable hardware compensation filter configured to be programmed with a compensation function having filter coefficients, wherein the filter coefficients are determined from programmable coefficients and parameters stored on the transmitting device, and wherein a function of the programmable hardware compensation filter (“Fcomp(s)”) is: Fcomp ⁡ ( s ) = y 0 · ( s 5 + s 4 · x 4 + s 3 · x 3 + s 2 · x 2 + s · x 1 + x 0 ) x 1 · ( s 5 + s 4 · z 4 + s 3 · z 3 + s 2 · z 2 + s · z 1 + z 0 ) , ⁢ where x 0 = a · K ϕ ⁢ A · b · w n 2 · K vco N x 1 = K ϕ ⁢ A · b · w n 2 · K vco N x 2 = w n 2 · b , ⁢ x 3 = w n 2 + 2 ⁢ ξ · w n · b x 4 = w n 2 + 2 ⁢ ξ

Assignees

Inventors

Classifications

  • Details of the phase-locked loop · CPC title

  • H03C3/08Primary

    Modifications of modulator to linearise modulation, e.g. by feedback, and clearly applicable to more than one type of modulator · CPC title

  • H03L7/10Primary

    for assuring initial synchronisation or for broadening the capture range · CPC title

  • H03C3/0908Primary

    using a phase locked loop · CPC title

  • modulating the reference clock · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9590645B2 cover?
An apparatus for PLL bandwidth expansion including a compensation filter and a phase locked loop, where the compensation filter is programmed with a compensation function derived based on programmable coefficients and parameters of a transmitting device, a frequency response of the phase locked loop, and a wanted frequency response.
Who is the assignee on this patent?
Hughes Network Systems Llc, Hughes Networks Systems Llc
What technology area does this patent fall under?
Primary CPC classification H03C3/08. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 07 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).