Differential amplifier

Patent metadata

Field	Value
Publication number	US-9590576-B2
Application number	US-201514849160-A
Country	US
Kind code	B2
Filing date	Sep 9, 2015
Priority date	Sep 10, 2014
Publication date	Mar 7, 2017
Grant date	Mar 7, 2017

Abstract

A differential amplifier is disclosed. The differential amplifier includes: a pair of input terminals externally receiving an input signal; a first differential pair including a first transistor, a second transistor, a first resistor, and a second resistor and configured to generate a first signal; a second differential pair including a third transistor, a fourth transistor, a third resistor, and a fourth resistor and configured to generate a second signal; a current source connected to the first, second, third, and fourth resistors and configured to provide a current to the first and second differential pairs; a pair of level shifters configured to generate a shifted signal from the input signal; and a pair of output terminals externally outputting an output signal containing the first and second signals, wherein the first and second transistors receive the input signal and the third and fourth transistors receive the shifted signal.

First claim

What is claimed is:

1. A differential amplifier for generating a differential output current from a differential input voltage, comprising:
a pair of input terminals configured to externally receive the differential input voltage;
a first differential pair including a first transistor, a second transistor, a first resistor, and a second resistor, the first transistor and the second transistor each having a first current terminal connected to each other through the first resistor and the second resistor connected in series to the first resistor, the first differential pair being configured to generate a first differential signal in response to the differential input voltage;
a pair of level shifters configured to generate a shifted differential voltage shifted from the differential input voltage;
a second differential pair including a third transistor, a fourth transistor, a third resistor, and a fourth resistor, the third transistor and the fourth transistor each having a first current terminal thereof connected to each other through the third resistor and the fourth resistor connected in series to the third resistor, the second differential pair being configured to generate a second differential signal in response to the shifted differential voltage;
a current source configured to provide a constant current to the first and second differential pairs; and
a pair of output terminals configured to externally output the differential output current containing the first differential signal and the second differential signal.

2. The differential amplifier according to claim 1 ,
wherein each of the level shifters includes a shifting current source and a shifting resistor, and, in each level shifter, the shifting current source is configured to provide a shifting current to the shifting resistor to cause a voltage drop equal to a product of the shifting current and a resistance of the shifting resistor, and
wherein each of the level shifters shifts the differential input voltage to the shifted differential voltage by the voltage drop.

3. The differential amplifier according to claim 2 ,
wherein each of the level shifters further includes a shifting capacitor connected in parallel to the shifting resistor.

4. The differential amplifier according to claim 2 ,
wherein the differential input voltage is constituted by a positive-phase input voltage and a negative-phase input voltage having a phase opposite a phase of the positive-phase input voltage, the positive-phase input voltage being fed to a control terminal of the first transistor, the negative-phase input voltage being fed to a control terminal of the second transistor, and
wherein the shifted differential voltage is constituted by a positive-phase shifted voltage and a negative-phase shifted voltage, the positive-phase shifted voltage having an average lower than an average of the positive-phase input voltage by the voltage drop and the negative-phase shifted voltage having an average lower than an average of the negative-phase input voltage by the voltage drop, the positive phase shifted voltage being fed to a control terminal of the third transistor, the negative-phase shifted voltage being fed to a control terminal of the fourth transistor.

5. The differential amplifier according to claim 2 ,
wherein each of the level shifters further includes an input terminal and an output terminal, and, in each level shifter, the input terminal is connected to one end of the shifting resistor, and the output terminal is connected to the other end of the shifting resistor and one end of the shifting current source, and
wherein the other end of each shifting current source is grounded.

6. The differential amplifier according to claim 5 ,
wherein one of the pair of input terminals is connected to the input terminal of one of the level shifters and a control terminal of the first transistor,
wherein the other of the pair of input terminals is connected to the input terminal of the other of the level shifters and a control terminal of the second transistor,
wherein the output terminal of said one of the level shifters is connected to a control terminal of the third transistor, and
wherein the output terminal of said other of the level shifters is connected to a control terminal of the fourth transistor.

7. The differential amplifier according to claim 5 ,
further including a fifth transistor and a sixth transistor, the fifth transistor having a control terminal connected to one of the pair of input terminals and a first current terminal connected to the input terminal of one of the level shifters, the sixth transistor having a control terminal connected to the other of the pair of input terminals and a first current terminal connected to the input terminal of the other of the level shifters, and
wherein the fifth and sixth transistors each have second current terminals commonly connected to a power line.

8. The differential amplifier according to claim 5 ,
further including a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor each having a control terminal, a first current terminal, and second current terminal,
wherein one of the pair of input terminals is connected to the control terminal of the fifth transistor and the input terminal of one of the level shifters,
wherein the other of the pair of input terminals is connected to the control terminal of the sixth transistor and the input terminal of the other of the level shifters,
wherein the first current terminal of the fifth transistor is connected to a control terminal of the first transistor,
wherein the first current terminal of the sixth transistor is connected to a control terminal of the second transistor,
wherein the output terminal of said one of the level shifters is connected to a control terminal of the seventh transistor,
wherein the output terminal of said other of the level shifters is connected to a control terminal of the eighth transistor,
wherein the first current terminal of the seventh transistor is connected to a control terminal of the third transistor,
wherein the first current terminal of the eighth transistor is connected to a control terminal of the fourth transistor, and
wherein the respective second current terminals of the fifth, sixth, seventh, and eighth transistors are connected to a power line.

9. The differential amplifier according to claim 1 ,
wherein the first current terminal of the first transistor is connected to one end of the first resistor,
wherein the first current terminal of the second transistor is connected to one end of the second resistor,
wherein the first current terminal of the third transistor is connected to one end of the third resistor,
wherein the first current terminal of the fourth transistor is connected to one end of the fourth resistor, and
wherein the other end of each of the first, second, third, and fourth resistors is connected to one end of the current source.

10. An optical modulator driver for generating a driving signal from a differential input signal, comprising:
a pair of input transmission lines configured to externally receive the differential input signal at a pair of ends of the input transmission lines and configured to transmit the differential input signal;
differential amplifiers each comprising,
a pair of input terminals configured to receive the differential input signal;
a first differential pair including a first transistor, a second transistor, a first resistor, and a second resistor, the first transistor and the second transistor each having a first current terminal connected to each other through the first resistor and the second resistor connected in series to th

Assignees

• Sumitomo Electric Industries

Inventors

• Tatsumi Taizo

Classifications

• H03F2203/45026

  One or more current sources are added to the amplifying transistors in the differential amplifier · CPC title

• H03F2203/45612

  the IC comprising one or more input source followers as input stages in the IC · CPC title

• H03F3/45

  Differential amplifiers (differential sense amplifiers G11C7/062) · CPC title

• H03F2203/45361

  the AAC comprising multiple transistors parallel coupled at their drains only, e.g. in a cascode dif amp, only those forming the composite common source transistor · CPC title

• H03F3/45085 Primary

  Long tailed pairs (H03F3/45112, H03F3/45139 take precedence) · CPC title