Single stage buffer with filter

Patent metadata

Field	Value
Publication number	US-9590571-B2
Application number	US-201314041266-A
Country	US
Kind code	B2
Filing date	Sep 30, 2013
Priority date	Oct 2, 2012
Publication date	Mar 7, 2017
Grant date	Mar 7, 2017

Abstract

A single-stage buffer apparatus includes a first transistor, a second transistor, and a high pass filter network. The first transistor is configured to receive an input signal from a microphone. The second transistor is configured to operate as a cascode transistor. The high pass filter network is coupled to the first transistor and the second transistor. The second transistor electrically decouples the first transistor from an output of the single-stage buffer apparatus. A gate terminal of the second transistor is driven by the high-pass filter network, and the high-pass filter network is driven by the first transistor.

First claim

What is claimed is:

1. A single-stage buffer apparatus, comprising:
a first transistor having a first source terminal, a first drain terminal, and a first gate terminal, the first transistor configured to receive an input signal from a microphone;
a second transistor having a second source terminal, a second drain terminal, and a second gate terminal, the second transistor configured to operate as a cascode transistor, wherein the second drain terminal of the second transistor is coupled to the first source terminal of the first transistor;
a high pass filter network including at least one capacitor and at least one resistor, wherein the at least one capacitor is coupled to the first source terminal of the first transistor and the second drain terminal of the second transistor;
wherein the second transistor electrically decouples the first transistor from an output of the single-stage buffer apparatus;
wherein the second gate terminal of the second transistor is driven by the high-pass filter network, and the high-pass filter network is driven by the first source terminal of the first transistor.

2. The apparatus of claim 1 wherein a first back gate of the first transistor and a second back gate of the second transistor are dc biased to ground.

3. The apparatus of claim 2 wherein the first back gate of the first transistor and the second back gate of the second transistor are dc biased to ground via the at least one resistor of the high pass filter network and modulated with an in-phase output signal via the at least one capacitor of the high pass filter.

4. The apparatus of claim 1 wherein the microphone is a microelectromechancial (MEMS) microphone.

5. The apparatus of claim 1 wherein a first back gate of the first transistor is biased at ac ground.

6. The apparatus of claim 1 wherein the high pass filter network uses the second transistor to decouple the first source terminal of the first transistor with the output of the buffer apparatus.

7. The apparatus of claim 1 wherein the apparatus operates in a two-wire mode.

8. The apparatus of claim 1 wherein the apparatus operates in a three-wire mode.

9. The apparatus of claim 1 further comprising a low pass filter network coupled to an output of the first transistor.

10. An audio signal buffer circuit comprising:
a first transistor having an audio signal input terminal and an output terminal;
a second transistor having a first terminal coupled to an output of the buffer circuit, the second transistor having a second terminal coupled to the output terminal of the first transistor;
a high-pass filter network coupled to the output terminal of the first transistor and to an input terminal of the second transistor, the input terminal of the second transistor is different than the first terminal and the second terminal of the second transistor;
wherein the first transistor drives the second transistor via the high-pass filter network; and
wherein the second transistor electrically decouples the first transistor from the output of the buffer circuit.

11. The audio signal buffer circuit of claim 10 ,
the first transistor includes a first back gate DC biased to ground; and
the second transistor includes a second back gate DC biased to ground.

12. The audio signal buffer circuit of claim 11 , wherein the first back gate of the first transistor and the second back gate of the second transistor are DC biased to ground by a filter resistor of the high-pass filter network and modulated with an in-phase signal by a capacitor of the high-pass filter.

13. The audio signal buffer circuit of claim 10 , the high-pass filter network includes a capacitor coupled to the output terminal of the first transistor and to the input terminal of the second transistor, the high-pass filter network including a resistor coupled to the input terminal of the second transistor and to ground.

14. The audio signal buffer circuit of claim 10 further comprising a low pass filter network coupled to the output terminal of the first transistor.

15. The audio signal buffer circuit of claim 10 , wherein the audio signal buffer circuit is a three-terminal device.

16. The audio signal buffer circuit of claim 10 , wherein the audio signal buffer circuit is a two-terminal device.

17. An audio signal buffer circuit comprising:
a first transistor having a first source, a first drain, and a first gate, the first gate coupled to an audio signal input, the first source coupled to an output of the first transistor;
a second transistor having a second source, a second drain, and a second gate, the second source of the second transistor coupled to an output of the buffer circuit, the second drain of the second transistor coupled to the first source of the first transistor;
a high-pass filter network coupled to the first source of the first transistor and to the second gate of the second transistor;
wherein the output of the first transistor drives the high-pass filter network and the high-pass filter network drives the second gate of the second transistor; and
wherein the second transistor decouples the output of the first transistor from the output of the buffer circuit.

18. The audio signal buffer circuit of claim 17 , wherein a first back gate of the first transistor and a second back gate of the second transistor are DC biased to ground.

19. The audio signal buffer circuit of claim 18 , wherein the first back gate of the first transistor and the second back gate of the second transistor are DC biased to ground by a filter resistor of the high-pass filter network and modulated with an in-phase signal by a capacitor of the high-pass filter.

20. The audio signal buffer circuit of claim 18 further comprising a low-pass filter network coupled to the output of the first transistor.

21. The audio signal buffer circuit of claim 17 further comprising a third transistor having a third source, a third drain, and a third gate, the third transistor complementary to the first transistor;
the third gate of the third transistor coupled to the first drain of the first transistor;
the third drain of the third transistor coupled to the output of the buffer circuit; and
the third source of the third transistor and the first drain of the first transistor coupled to ground.

Assignees

• Knowles Electronics Llc

Inventors

• Jennings Michael
• Stein Craig
• Badillo Dean

Classifications

• H03F3/185 Primary

  with field-effect devices (H03F3/187 takes precedence) · CPC title

• H03F3/16 Primary

  with field-effect devices · CPC title

• H04R2410/00

  Microphones · CPC title

• H04R2410/07

  Mechanical or electrical reduction of wind noise generated by wind passing a microphone · CPC title

• H04R2410/03

  Reduction of intrinsic noise in microphones · CPC title