Semiconductor composite film with heterojunction and manufacturing method thereof

US9590049B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9590049-B2
Application numberUS-201514966818-A
CountryUS
Kind codeB2
Filing dateDec 11, 2015
Priority dateDec 7, 2012
Publication dateMar 7, 2017
Grant dateMar 7, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present invention discloses a semiconductor composite film with a heterojunction and a manufacturing method thereof. The semiconductor composite film includes: a semiconductor substrate; and a semiconductor epitaxial layer, which is formed on the semiconductor substrate, and it has a first surface and a second surface opposite to each other, wherein the heterojunction is formed between the first surface and the semiconductor substrate, and wherein the semiconductor epitaxial layer further includes at least one recess, which is formed by etching the semiconductor epitaxial layer from the second surface toward the first surface. The recess is for mitigating a strain in the semiconductor composite film.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing semiconductor composite film with a heterojunction, comprising: providing a semiconductor substrate; forming a semiconductor epitaxial layer on the semiconductor substrate, the semiconductor epitaxial layer having a first surface and a second surface opposite to each other, wherein the heterojunction is formed between the first surface and the semiconductor substrate; and forming at least one recess from the second surface inwardly toward the first surface by etching the semiconductor epitaxial layer from the second surface toward the first surface, for mitigating a strain in the semiconductor composite film. 2. The method of claim 1 , further comprising: forming at least one semiconductor device in or which includes the semiconductor epitaxial layer. 3. The method of claim 1 , wherein the recess has a bottom, and the recess penetrates the semiconductor epitaxial layer such that the bottom is in the semiconductor substrate. 4. The method of claim 1 , wherein the recess has a bottom, and the bottom is substantially on the same plane as the heterojunction. 5. The method of claim 1 , further comprising: forming at least one semiconductor device in or which includes the semiconductor epitaxial layer, and the recess does overlap with the semiconductor device.

Assignees

Inventors

Classifications

  • of Group III-V materials · CPC title

  • Nitrides · CPC title

  • being crystalline insulating materials · CPC title

  • Silicon carbide · CPC title

  • characterised by treatments done after the formation of the materials · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9590049B2 cover?
The present invention discloses a semiconductor composite film with a heterojunction and a manufacturing method thereof. The semiconductor composite film includes: a semiconductor substrate; and a semiconductor epitaxial layer, which is formed on the semiconductor substrate, and it has a first surface and a second surface opposite to each other, wherein the heterojunction is formed between the …
Who is the assignee on this patent?
Su Hung-Der, Chiu Chien-Wei, Huang Tsung-Yi, and 1 more
What technology area does this patent fall under?
Primary CPC classification H10P14/2921. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 07 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).