3-d structured two-phase cooling boilers with nano structured boiling enhancement coating
US-2024431075-A1 · Dec 26, 2024 · US
US9589874B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9589874-B2 |
| Application number | US-201514857041-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 17, 2015 |
| Priority date | Dec 12, 2014 |
| Publication date | Mar 7, 2017 |
| Grant date | Mar 7, 2017 |
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An assembly is made of an integrated circuit chip and a plate. At least one channel is arranged between the chip and the plate. The channel is delimited by metal sidewalls at least partially extending from one surface of the chip to an opposite surface of the plate. The assembly is encapsulated in a body that includes an opening extending to reach the channel. The plate may be one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate.
Opening claim text (preview).
The invention claimed is: 1. An apparatus, comprising: an integrated circuit chip; and a plate; wherein at least one channel arranged between the integrated circuit chip and the plate extends from one edge to another edge of a smaller one of the integrated circuit chip and the plate, and is delimited by metal sidewalls at least partially extending from a surface of the integrated circuit chip toward an opposite surface of the plate, the metal sidewalls extending continuously from the one edge to the another edge of the smaller one of the integrated circuit chip and the plate. 2. The apparatus of claim 1 , further comprising interstitial resin that fills, outside of said at least one channel, a volume available between the integrated circuit chip and the plate. 3. The apparatus of claim 1 , wherein said at least one channel extends beyond said edges. 4. The apparatus of claim 1 , wherein the plate is one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate. 5. The apparatus of claim 1 , wherein the sidewalls comprise aligned adjacent metal bumps. 6. The apparatus of claim 1 , further comprising an encapsulation resin defining an upper surface disposed parallel to an active surface of the integrated circuit chip, openings formed in the upper surface extending through the encapsulation resin to reach ends of said at least one channel. 7. The apparatus of claim 1 , wherein connection elements extend, outside of said at least one channel, from the surface of the integrated circuit chip to the opposite surface of the plate. 8. The apparatus of claim 1 wherein the metal sidewalls are a plurality of continuous metal lines. 9. An apparatus, comprising: an integrated circuit chip having a first surface; a plate having a second surface; wherein the integrated circuit chip is mounted to the plate with the first surface facing the second surface; a channel with metal sidewalls extending between the first surface of the integrated circuit chip and the second surface of the plate; and an encapsulating body surrounding the integrated circuit chip and the plate and forming an upper surface oriented parallel to the first surface of the integrated circuit chip, an opening formed in the upper surface extending to reach said channel. 10. The apparatus of claim 9 , wherein the plate is one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate. 11. The apparatus of claim 9 , wherein the sidewalls comprise aligned adjacent metal bumps. 12. The apparatus of claim 9 wherein the metal sidewalls are a plurality of continuous metal lines. 13. An apparatus, comprising: an integrated circuit chip; a plate; at least one open channel delimited by metal sidewalls extending between a surface of the integrated circuit chip and a surface of the plate, the metal sidewalls extending continuously from one edge of the integrated circuit chip to an opposite edge of the integrated circuit chip, the at least one open channel; corresponding to a height of each of the metal sidewalls on one of the surface of the integrated circuit chip or the surface of the plate; and an encapsulation resin arranged on at least one of the integrated circuit chip and the plate, said encapsulation resin including an opening that extends to reach said at least one open channel. 14. The apparatus of claim 13 , wherein the plate is one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate. 15. The apparatus of claim 13 , wherein the metal sidewalls comprise aligned adjacent metal bumps. 16. The apparatus of claim 13 wherein the encapsulation resin defines an upper surface oriented parallel to an active surface of the integrated circuit chip and the opening is formed in the upper surface of the encapsulation resin. 17. An apparatus, comprising: an integrated circuit chip having a first surface; a pair of metal sidewalls extending from one edge of the integrated circuit chip to an opposite edge of the integrated circuit chip on the first surface, said pair of metal sidewalls at least partially defining an open channel; a plate mounted to top surfaces of the metal sidewalls; a body which encapsulates the integrated circuit chip and plate and defines an upper surface disposed parallel to the first surface of the integrated circuit chip, said body including an opening extending from and formed in the upper surface to reach the open channel. 18. The apparatus of claim 17 , wherein the plate is one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate. 19. The apparatus of claim 17 , wherein the metal sidewalls comprise aligned adjacent metal bumps. 20. The apparatus of claim 17 wherein a portion of the open channel extends orthogonal to the metal sidewalls, said portion being aligned with the opening formed in the upper surface of the encapsulate body. 21. The apparatus of claim 17 wherein the first surface of the integrated circuit chip is an active surface.
by chemical means · CPC title
between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
between stacked chips · CPC title
between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title
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