Semiconductor device and method of operating a semiconductor device

Patent metadata

Field	Value
Publication number	US-9584104-B2
Application number	US-201414214801-A
Country	US
Kind code	B2
Filing date	Mar 15, 2014
Priority date	Mar 15, 2014
Publication date	Feb 28, 2017
Grant date	Feb 28, 2017

Abstract

A semiconductor device comprising a substrate and an electronic circuit thereon is described. The electronic circuit comprises a first voltage provider node, a second voltage provider node, and an intermediary node connected to the first and second voltage provider node by a first and second network with a first and second resistance, respectively. The substrate is susceptible to conducting a substrate current. The semiconductor device further comprises a substrate current sensor. The first network is arranged to reduce the first resistance in response to the substrate current sensor signaling an increase of the substrate current and vice versa. Similarly, the second network is arranged to reduce the second resistance in response to the substrate current sensor signaling an increase of the substrate current and vice versa.
A method of operating a semiconductor device is also disclosed.

First claim

The invention claimed is:

1. A semiconductor device, comprising a substrate and an electronic circuit formed at least partly on or in the substrate; wherein
the electronic circuit comprises a first voltage provider node, a second voltage provider node, and an intermediary node, wherein the intermediary node is connected to the first voltage provider node by a first network having a first resistance and to the second voltage provider node by a second network having a second resistance, the resistance between the intermediary node and the first voltage provider node being the first resistance and the resistance between the intermediary node and the second voltage provider node being the second resistance;
the substrate is susceptible to conducting a substrate current, which is a variable spurious electrical current and the semiconductor device further comprises a substrate current sensor connected to the substrate and arranged to sense the substrate current;
the first network is arranged to reduce the first resistance in response to the substrate current sensor signaling an increase of the substrate current and to increase the first resistance in response to the substrate current sensor signaling a decrease of the substrate; and
the second network is arranged to reduce the second resistance in response to the substrate current sensor signaling an increase of the substrate current and to increase the second resistance in response to the substrate current sensor signaling a decrease of the substrate.

2. The semiconductor device of claim 1 , wherein the intermediary node is arranged to provide a bias voltage or a reference voltage.

3. The semiconductor device of claim 2 , wherein the ratio of the first resistance to the second resistance is conserved in said operations of reducing and increasing the first and second resistance.

4. The semiconductor device of claim 1 , wherein the ratio of the first resistance to the second resistance is conserved in said operations of reducing and increasing the first and second resistance.

5. The semiconductor device of claim 1 , wherein the first network comprises a switch connected between the first voltage provider node and the intermediary node and wherein the second network comprises a switch connected between the intermediary node and the second voltage provider node, wherein the switch of the first network and the switch of the second network are each arranged to become more conductive in response to the substrate current sensor signaling an increase of the substrate current and to become less conductive in response to the substrate current sensor signaling a decrease of the substrate current.

6. The semiconductor device of claim 5 , wherein the first network and the second network each comprise a first path and a second path connected in parallel, the first path comprising the switch of the first or second network, the second path comprising a resistor.

7. The semiconductor device of claim 5 , wherein the switch of the first network and the switch of the second network each have a control input connected to the substrate current sensor.

8. The semiconductor device of claim 1 , wherein the electronic circuit comprises a current source for producing a control current, wherein the resistance of the first network and the resistance of the second network depend on the control current, and wherein the current source is arranged to increase the control current in response to the substrate current sensor signaling an increase of the substrate current and to reduce the control current in response to the substrate current sensor signaling a decrease of the substrate current.

9. The semiconductor device of claim 8 , wherein the current source comprises a first current source and a boost line connected in parallel to the first current source, the boost line comprising a second current source and a switch connected in series with the second current source, wherein the switch is arranged to turn on in response to the substrate current sensor signaling an increase of the substrate current and to turn off in response to the substrate current sensor signaling a decrease of the substrate current.

10. The semiconductor device of claim 1 , wherein the substrate current sensor is arranged to define a non-zero threshold current, and wherein said increase of the substrate current includes the substrate current exceeding the threshold current and said decrease of the substrate current includes the substrate current dropping below the threshold current.

11. The semiconductor device of claim 1 , wherein the substrate current sensor comprises a charge collecting region which is a doped region of the substrate.

12. The semiconductor device of claim 11 , wherein the charge collecting region surrounds a region comprising the intermediary node.

13. The semiconductor device of claim 11 , where the substrate is of a p type and the charge collecting region is of an n type, or vice versa.

14. The semiconductor device of claim 11 , wherein the substrate current sensor comprises:
a current source connected to the charge collecting region and arranged to inject a threshold current into the charge collecting region, and
a voltage sensor connected to the charge collecting region and arranged to produce a detection signal in dependence of a voltage at the charge collecting region.

15. The semiconductor device of claim 14 , wherein the voltage sensor comprises a Schmitt trigger and a retriggerable monoflop, the Schmitt trigger having an input connected to the charge collecting region and an output connected to an input of the retriggerable monoflop.

16. A method of operating a semiconductor device, wherein the semiconductor device comprises a substrate and an electronic circuit formed at least partly on or in the substrate;
the electronic circuit comprises a first voltage provider node, a second voltage provider node, and an intermediary node, wherein the intermediary node connected to the first voltage provider node by a first network having a first resistance and to the second voltage provider node by a second network having a second resistance, the resistance between the intermediary node and the first voltage provider node being the first resistance and the resistance between the intermediary node and the second voltage provider node being the second resistance;
the substrate is susceptible to conducting a substrate current which is a variable spurious electrical current and the semiconductor device further comprises a substrate current sensor connected to the substrate and which senses the substrate current;
wherein the method comprises:
in response to the substrate current sensor signaling an increase of the substrate current, reducing both the first resistance and the second resistance; and
in response to the substrate current sensor signaling a decrease of the substrate, increasing both the first resistance and the second resistance.

Assignees

• Bode Hubert
• Lesbats Mathieu Gauthier
• Roth Andreas Johann
• Nxp Usa Inc

Inventors

• Bode Hubert
• Lesbats Mathieu Gauthier
• Roth Andreas Johann

Classifications

• H03K5/1252 Primary

  Suppression or limitation of noise or interference (specially adapted for transmission systems H04B15/00, H04L25/08) · CPC title