Apparatus and methods for radio frequency amplifiers

Patent metadata

Field	Value
Publication number	US-9584078-B2
Application number	US-201414457965-A
Country	US
Kind code	B2
Filing date	Aug 12, 2014
Priority date	May 10, 2011
Publication date	Feb 28, 2017
Grant date	Feb 28, 2017

Abstract

Apparatus and methods for radio frequency (RF) amplifiers are disclosed herein. In certain implementations, a packaged RF amplifier includes a first bipolar transistor including a base electrically connected to an RF input pin and a collector electrically connected to an RF output pin, and a second bipolar transistor including a base electrically connected to an emitter of the first bipolar transistor and a collector electrically connected to the RF output pin. The packaged RF amplifier further includes a first bias circuit electrically connected between the base of the first bipolar transistor and the RF output pin, a second bias circuit electrically connected between the base of the first bipolar transistor and a power low pin, an inductor implemented at least partly by a bond wire, and a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin.

First claim

What is claimed is:

1. An electronic amplification circuit comprising:
a first bipolar transistor including an emitter, a base electrically connected to a radio frequency input node, and a collector electrically connected to a radio frequency output node;
a second bipolar transistor including an emitter, a base electrically connected to the emitter of the first bipolar transistor, and a collector electrically connected to the radio frequency output node;
a first bias circuit including a first resistor electrically connected between the base of the first bipolar transistor and the radio frequency output node;
a second bias circuit including a first diode, a second diode, and a second resistor electrically connected in series between the base of the first bipolar transistor and a power low node;
an inductor; and
a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low node.

2. The electronic amplification circuit of claim 1 wherein the inductor is formed at least partly using a bond wire.

3. The electronic amplification circuit of claim 2 wherein a length of the bond wire is configured to control a value of a third order intercept point associated with the first and second bipolar transistors.

4. The electronic amplification circuit of claim 2 further comprising a die that includes the first and second bipolar transistors, the bond wire configured to pass over more than half of a length of the die.

5. The electronic amplification circuit of claim 1 wherein the inductor has an inductance ranging between about 0.3 nH and about 4 nH.

6. The electronic amplification circuit of claim 1 further comprising a fourth bias circuit electrically connected between the emitter of the second bipolar transistor and the power low node.

7. The electronic amplification circuit of claim 6 wherein the third bias circuit includes a third diode and a third resistor electrically connected in series with the inductor between the emitter of the first bipolar transistor and the power low node.

8. The electronic amplification circuit of claim 7 wherein the fourth bias circuit includes a fourth resistor electrically connected between the emitter of the second bipolar transistor and the power low node.

9. The electronic amplification circuit of claim 1 further comprising a capacitor electrically connected between the emitter of the first bipolar transistor and a base of the second bipolar transistor.

10. A radio frequency amplification circuit comprising:
a first field effect transistor including a source, a gate electrically connected to a radio frequency input node, and a drain electrically connected to a radio frequency output node;
a second field effect transistor including a source, a gate electrically connected to the source of the first field effect transistor, and a drain electrically connected to the radio frequency output node;
a first bias circuit including a first resistor electrically connected between the gate of the first field effect transistor and the radio frequency output node;
a second bias circuit a first diode, a second diode, and a second resistor electrically connected in series between the gate of the first field effect transistor and a power low node;
an inductor; and
a third bias circuit electrically connected in series with the inductor between the gate of the second field effect transistor and the power low node.

11. The radio frequency amplification circuit of claim 10 wherein the inductor is formed at least partly using a bond wire.

12. The radio frequency amplification circuit of claim 11 wherein a length of the bond wire is configured to control a value of a third order intercept point associated with the first and second field effect transistors.

13. The radio frequency amplification circuit of claim 11 further comprising a die that includes the first and second field effect transistors, the bond wire configured to pass over more than half of a length of the die.

14. The radio frequency amplification circuit of claim 10 further comprising a fourth bias circuit electrically connected between the source of the second field effect transistor and the power low node.

15. The radio frequency amplification circuit of claim 14 wherein the third bias circuit includes a third diode and a third resistor electrically connected in series with the inductor between the source of the first field effect transistor and the power low node.

16. The radio frequency amplification circuit of claim 15 wherein the fourth bias circuit includes a fourth resistor electrically connected between the source of the second field effect transistor and the power low node.

17. A packaged radio frequency amplifier comprising:
a first bipolar transistor including an emitter, a base electrically connected to a radio frequency input pin, and a collector electrically connected to field effect transistor output pin;
a second bipolar transistor including an emitter, a base electrically connected to the emitter of the first bipolar transistor, and a collector electrically connected to the field effect transistor output pin;
a first bias circuit including a first resistor electrically connected between the base of the first bipolar transistor and the radio frequency output pin;
a second bias circuit including a first diode, a second diode, and a second resistor electrically connected in series between the base of the first bipolar transistor and a power low pin;
an inductor implemented at least partly by a bond wire; and
a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin.

18. The packaged radio frequency amplifier of claim 17 wherein the second bias circuit is electrically connected between the base of the first bipolar transistor and the power low pin by way of a through wafer via.

19. The packaged radio frequency amplifier of claim 18 wherein a length of the bond wire is configured to control a value of a third order intercept point associated with the first and second bipolar transistors.

20. The packaged radio frequency amplifier of claim 17 further comprising a fourth bias circuit electrically connected between the emitter of the second bipolar transistor and the power low pin.

Assignees

• Skyworks Solutions Inc

Inventors

• Ake Alan William
• Dening David C

Classifications

• H10W72/5449

  not being orthogonal to a side surface of the chip, e.g. fan-out arrangements · CPC title

• H10W72/5473

  multiple bond wires connected to a common bond pad · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/932

  Plan-view shape, i.e. in top view · CPC title

• H10W44/226

  for HF amplifiers · CPC title