Thin film solar cell backside contact manufacturing process

US9583649B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9583649-B2
Application numberUS-201514746413-A
CountryUS
Kind codeB2
Filing dateJun 22, 2015
Priority dateJun 22, 2015
Publication dateFeb 28, 2017
Grant dateFeb 28, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Embodiments of the invention related to a method for manufacturing a thin film solar cell backside contact. Prior to application of materials, a planar substrate is provided and an associated backside of the substrate is modified to form one or more pedestals. The modified substrate is layered with multiple layers of material, including a conducting layer, a reflective layer, and a passivation layer. The layered backside substrate is polished to expose portions of the conducting layer at discrete locations on the backside of the substrate. The exposed portions of the conducting layer maintain direct electrical communication between an absorber layer deposited on the layered backside substrate and the conducting layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a thin film solar cell backside contact comprising a layered substrate, the method comprising: modifying a backside substrate, including deforming a first side of the substrate, wherein a surface profile on the first side of the substrate includes one or more extensions; creating a multi-layered substrate in communication with the modified backside, including depositing a conducting layer on the modified substrate, depositing a reflective layer on the conducting layer, and depositing a passivation layer on the reflective layer; polishing the surface profile of the layered substrate, wherein the polishing exposes the conducting layer adjacent to the one or more extensions, and the polishing forming a backside surface; depositing an absorber layer across the polished surface; depositing a buffer layer across the absorber layer; depositing a transparent oxide across the buffer layer; applying an anti-reflective coating to the transparent oxide; and forming a contact grid across the backside of the layered substrate, the contact grid in communication with the transparent oxide layer. 2. The method of claim 1 , wherein the conducting, reflective, and passivation layers are sequentially deposited across the backside of the substrate, the sequential deposit including preservation of the extensions formed through the substrate modification. 3. The method of claim 2 , wherein forming the contact grid further comprising polishing a discrete area of the anti-reflective coating, and applying a grid layer to the polished area, the grid layer in communication with the transparent oxide. 4. The method of claim 3 , further comprising the grid layer protruding vertically from the backside of the layered substrate. 5. The method of claim 1 , wherein the conducting layer is comprised of Molybdenum (Mo) material. 6. The method of claim 1 , wherein the absorber layer is comprised of Copper Indium Gallium Selenide (CIGS) material. 7. The method of claim 6 , wherein the layer of CIGS is between 0.5 and 5 micrometers in thickness. 8. The method of claim 1 , wherein polishing the surface profile, further comprising recessing the extensions to a planar level of the passivation layer and forming an electrical contact. 9. The method of claim 1 , wherein the backside surface has a characteristic selected from the group consisting of: planar and relatively planar. 10. A thin film solar cell, the cell comprising: a layered, backside contact comprising an embossed substrate, a conducting layer, a reflective layer, and a passivation layer, the contact polished to expose portions of the conducting layer at the surface of the contact; an absorber layer in communication with polished contact; a buffer layer in communication with the absorber layer; a transparent layer in communication with the buffer layer; a contact grid in communication with the transparent layer; and an anti-reflective coating in communication with the contact grid and the first transparent layer. 11. The cell of claim 10 , wherein the conducting layer is constructed from a Molybdenum (Mo) material. 12. The cell of claim 10 , wherein the reflective layer is constructed from a silver (Ag) material. 13. The cell of claim 10 , wherein the passivation layer is constructed from an Aluminum Oxide (Al 2 O 3 ) material. 14. The cell of claim 10 , wherein the absorber layer is constructed from a material selected from the group consisting of: Copper Indium Gallium Selenide (CIGS) and copper zinc tin sulfide (CZTS). 15. The cell of claim 14 , wherein the layer of CIGS is between 0.5 and 5 micrometers in thickness.

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9583649B2 cover?
Embodiments of the invention related to a method for manufacturing a thin film solar cell backside contact. Prior to application of materials, a planar substrate is provided and an associated backside of the substrate is modified to form one or more pedestals. The modified substrate is layered with multiple layers of material, including a conducting layer, a reflective layer, and a passivation …
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H01L31/022441. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).