Nano deposition and ablation for the repair and fabrication of integrated circuits

US9583401B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9583401-B2
Application numberUS-201414179099-A
CountryUS
Kind codeB2
Filing dateFeb 12, 2014
Priority dateFeb 12, 2014
Publication dateFeb 28, 2017
Grant dateFeb 28, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An apparatus for and methods of repairing and manufacturing integrated circuits using the apparatus. The apparatus, comprising: a vacuum chamber containing: a movable stage configured to hold a substrate; an inspection and analysis probe; a heat source; a gas injector; and a gas manifold connecting multiple gas sources to the gas injector.

First claim

Opening claim text (preview).

What is claimed is: 1. A method, comprising: (a) providing an apparatus including: a vacuum chamber containing a movable stage configured to hold a substrate, an inspection and analysis probe, a heat source, a gas injector and a gas manifold, said gas manifold connecting multiple gas sources to said gas injector; (b) loading a substrate onto said movable stage; (c) scanning said substrate for defects using said inspection and analysis probe; (d) if a defect is found determining if it is (i) a short or extension between wires, (ii) an open or notch in a wire, or (iii) a void in a dielectric layer between said wires; determining a chemical composition of said defect; selecting a gas from said multiple gas sources for repairing said defect; if said defect is a short or extension between wires either laser abating or plasma etching said defect using said selected gas; if said defect is an open or notch in a wire, depositing a conductive material to repair said defect using said selected gas; and if said defect is a void in a dielectric layer between wires, depositing a dielectric material to repair said defect using said selected gas; and (e) repeating steps (c) and (d) until no defects are found. 2. The method of claim 1 , wherein said inspection and analysis probe includes a scanning electron microscope probe connected to an image recognition system and (c) includes using said image recognition system to determine if a defect exists. 3. The method of claim 1 , wherein said inspection and analysis probe includes an energy dispersive X-ray spectrophotometer probe and said determining a chemical composition of said defect includes using said dispersive X-ray spectrophotometer probe to determine said chemical composition of said defect. 4. The method of claim 1 , wherein said substrate is a semiconductor substrate. 5. The method of claim 1 , wherein said multiple gas sources comprise: at least one inert gas comprising one or more of nitrogen, argon and neon; and at least one etchant gas comprising one or more of chloro and fluoro hydrocarbons, oxygen and hydrogen; and at least one metal deposition gas comprising one or more of aluminum alkyls, triisobutylaluminum, tri methyl aluminum, aluminum alkyl hydrides, dimethylaluminum hydride, copper beta-diketonates, copper (II) dialykldithiocarbamate complexes, and tungsten hexafluoride. 6. The method of claim 5 , wherein said multiple gas sources further comprise: at least one dielectric deposition gas comprising one or more of tetraethylorthosilicate, silane and nitrogen tetra fluoride. 7. A method, comprising: (a) providing an apparatus including: a controller and a vacuum chamber, said vacuum chamber containing a movable stage configured to hold a substrate, an inspection and analysis probe, a heat source; a gas injector and a gas manifold, said gas manifold connecting multiple gas sources to said gas injector; (b) loading a substrate onto said movable stage; (c) loading a wiring scheme into said controller; (d) selecting a wiring instruction from said wiring scheme and determining if the instruction is to connect wires or cut wires and selecting a gas from said multiple gas sources; (e) if said instruction is to cut a wire, either laser abating or plasma etching said wire using said selected gas or if said instruction is to connect wires, depositing a conductive material between said wires to connect said wires; and (f) repeating steps (c) and (e) until no there are no further instructions. 8. The method of claim 7 , wherein said inspection and analysis probe includes a scanning electron microscope probe connected to an image recognition system. 9. The method of claim 7 , wherein said inspection and analysis probe includes an energy dispersive X-ray spectrophotometer probe and said determining a chemical composition of said defect includes using said dispersive X-ray spectrophotometer probe to determine said chemical composition of said defect. 10. The method of claim 7 , wherein said substrate is a semiconductor substrate and wherein said multiple gas sources comprise: at least one inert gas comprising one or more of nitrogen, argon and neon; and at least one etchant gas comprising one or more of chloro and fluoro hydrocarbons, oxygen and hydrogen; and at least one metal deposition gas comprising one or more of aluminum alkyls, triisobutylaluminum, tri methyl aluminum, aluminum alkyl hydrides, dimethylaluminum hydride, copper beta-diketonates, copper (II) dialykldithiocarbamate complexes, and tungsten hexafluoride.

Assignees

Inventors

Classifications

  • using plasma jets · CPC title

  • Relative arrangement or disposition of electrodes; moving means · CPC title

  • Coating on selected surface areas, e.g. using masks · CPC title

  • quality control · CPC title

  • Gas control, e.g. control of the gas flow · CPC title

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Frequently asked questions

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What does patent US9583401B2 cover?
An apparatus for and methods of repairing and manufacturing integrated circuits using the apparatus. The apparatus, comprising: a vacuum chamber containing: a movable stage configured to hold a substrate; an inspection and analysis probe; a heat source; a gas injector; and a gas manifold connecting multiple gas sources to the gas injector.
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10P74/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).