System and method for capturing images with multiple image sensing elements

US9578223B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9578223-B2
Application numberUS-201313972742-A
CountryUS
Kind codeB2
Filing dateAug 21, 2013
Priority dateAug 21, 2013
Publication dateFeb 21, 2017
Grant dateFeb 21, 2017

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  1. Title

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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Methods, devices, and computer program products for CMOS visible image sensors incorporating multiple image sensing elements with different integration times to extend dynamic range are disclosed herein. In one aspect, a method of taking an image using a CMOS visible image sensor that includes at least one first light sensing element with a first well capacity and at least one second light sensing element with a second well capacity, where the second well capacity is greater than the first well capacity is disclosed. The method includes determining a first integration time for each of the at least one first light sensing elements. The method further includes determining a second integration time for each of the at least one second light sensing elements, where the second integration time is different than the first integration time.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of capturing an image with an image sensor comprising a plurality of pixels, comprising: providing a first well capacity via a first light sensing element of a pixel of the plurality of pixels; providing a second well capacity via a second light sensing element of the pixel of the plurality of pixels, wherein the second well capacity is greater than the first well capacity; determining a first integration time for the first light sensing element of the pixel; and determining a second integration time for the second light sensing element of the pixel, where the second integration time is different than the first integration time; and sharing one or more transistors between the first light sensing element and the second light sensing element of each pixel, the shared one or more transistors being integrated within the pixel comprising the first light sensing element and the second light sensing element. 2. The method of claim 1 , further comprising: forming an image based, at least in part, on at least one signal from the first light sensing element of the pixel and at least one signal from the second light sensing element of the pixel. 3. The method of claim 2 , wherein forming an image comprises forming an image based at least in part on a formula: T hdr ( x,y )=(1−α( x,y ))· T 1( x,y )+α( x,y )· T 2( x,y ) where T1 is a readout value of the first light sensing element of the pixel, T2 is a readout value of the second light sensing element of the pixel, T hdr is a combined image, and where α ⁡ ( x , y ) = 1 1 + ⅇ - a ⁡ ( MAD ⁡ ( x , y ) - b ) where a and b are tuning parameters which control a transition width and where MAD is a local mean absolute difference value, defined as MAD ⁡ ( x , y ) = ( ∑ i , j ∈ W ⁡ ( x , y ) ⁢ ⁢  T ⁢ ⁢ 1 ⁢ ( i , j ) - R × T ⁢ ⁢ 2 ⁢ ( i , j )  ) ⁢ / ⁢ N . where N is a total number of pixels within a window W(x,y) centered at pixel (x,y). 4. The method of claim 1 , wherein the image is a high dynamic range image. 5. The method of claim 1 , wherein at least one of the first light sensing element of the pixel and the second light sensing element of the pixel are photodiodes. 6. The method of claim 1 , wherein the second integration time is shorter than the first integration time. 7. The method of claim 1 , wherein at least one of the first integration time and the second integration time are determined based, at least in part, on lighting conditions. 8. An electronic device, comprising: a CMOS visible image sensor comprising a plurality of pixels, wherein a pixel of the plurality of pixels includes a first light sensing element with a first well capacity and a second light sensing element with a second well capacity, where the second well capacity is greater than the first well capacity, wherein the first light sensing element and the second light sensing element of each pixel share one or more transistors, the shared one or more transistors being integrated within the pixel comprising the first light sensing element and the second light sensing element; and a processor configured to: determine a first integration time to be used for the first light sensing element of the pixel; and determine a second integration time to be used for the second light sensing element of the pixel, where the second integration time is different than the first integration time. 9. The device of claim 8 , wherein at least one of the first light sensing element of the pixel and the second light sensing element of the pixel comprises a photodiode. 10. The device of claim 8 , wherein

Assignees

Inventors

Classifications

  • comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title

  • with different integration times · CPC title

  • H04N23/45Primary

    for generating image signals from two or more image sensors being of different type or operating in different modes, e.g. with a CMOS sensor for moving images in combination with a charge-coupled device [CCD] for still images · CPC title

  • H04N25/585Primary

    with pixels having different sensitivities within the sensor, e.g. fast or slow pixels or pixels having different sizes · CPC title

  • H04N5/2258Primary

    Electricity · mapped topic

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What does patent US9578223B2 cover?
Methods, devices, and computer program products for CMOS visible image sensors incorporating multiple image sensing elements with different integration times to extend dynamic range are disclosed herein. In one aspect, a method of taking an image using a CMOS visible image sensor that includes at least one first light sensing element with a first well capacity and at least one second light sens…
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H04N23/45. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).