Detecting method and device for suppressing interference of low-frequency noise

US9577614B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9577614-B2
Application numberUS-201313889436-A
CountryUS
Kind codeB2
Filing dateMay 8, 2013
Priority dateMay 8, 2012
Publication dateFeb 21, 2017
Grant dateFeb 21, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The invention detects the difference between the maximum signal and the minimum signal at each of a plurality of cycles separately when a sine wave is received. All differences are summed for generating a single detected signal for suppressing the interference of low-frequency noise. No synchronization with the sine wave is necessary and the detection can start at any phase of the sine wave.

First claim

Opening claim text (preview).

What is claimed is: 1. A writing detecting device for suppressing interference of low-frequency noise, comprising: a pointing device for providing a sine wave with a fixed period; a touch screen including a plurality of conductive strips composed of a plurality of vertical conductive strips and a plurality of horizontal conductive strips for receiving the sine wave through capacitive coupling; and a controller including: a detecting circuit for a plurality of signal detections, starting at least one of said signal detections at any arbitrary phase of the received sine wave, each signal detection lasting for a cycle, wherein the detecting circuit includes: a first signal filtering circuit for filtering out a maximum signal in one cycle starting from the arbitrary phase at each signal detection; a second signal filtering circuit for filtering out a minimum signal in one cycle starting from the arbitrary phase at each signal detection; and a signal difference generating circuit for generating a respective signal difference between the maximum and the minimum signals for each signal detection; and a summing circuit for summing all the signal differences for the plurality of signal detections to generate a complete detected signal. 2. The detecting device of claim 1 , wherein the first signal filtering circuit includes: a first diode that only allows the positive cycle of the sine wave to pass through; and a first capacitor for holding the maximum signal provided by the first diode during each signal detection. 3. The detecting device of claim 1 , wherein the second signal filtering circuit includes: a second diode that only allows the negative cycle of the sine wave to pass through; and a second capacitor for holding the minimum signal provided by the second diode during each signal detection. 4. The detecting device of claim 1 , wherein the first signal filtering circuit includes: a first capacitor for holding the maximum signal received during each signal detection; a first comparator including a first negative input, a first positive input and a first output, wherein the first positive input receives the sine wave, and the first negative input receives the maximum signal held by the first capacitor; and a first switch for providing the sine wave to the first capacitor according to a signal of the first output when the signal at the first positive input is greater than the signal at the first negative input. 5. The detecting device of claim 1 , wherein the second signal filtering circuit includes: a second capacitor for holding the minimum signal received during each signal detection; a second comparator including a second negative input, a second positive input and a second output, wherein the second negative input receives the sine wave, and the second positive input receives the minimum signal held by the second capacitor; and a second switch for providing the sine wave to the second capacitor according to a signal of the second output when the signal at the second positive input is greater than the signal at the second negative input. 6. The detecting device of claim 1 , wherein the controller performs the plurality of signal detections with an internal clock cycle, and the phase of the internal clock is asynchronous with the phase of the sine wave. 7. The detecting device of claim 6 , wherein the period of the internal clock and the period of the sine wave are the same. 8. The detecting device of claim 7 , wherein the controller adjusts the period of the internal clock based on the period of the sine wave. 9. The detecting device of claim 7 , wherein the controller further includes providing a driving signal to one conductive strip or a set of conductive strips based on the period of the sine wave, wherein the pointing device receives the driving signal via capacitively coupling or electromagnetically induction with the one conductive strip or the set of conductive strips being provided with the driving signal, and changes the period of the sine wave based on the period of the driving signal. 10. A detecting method for suppressing interference of low-frequency noise, comprising: receiving a sine wave with a fixed period; performing a plurality of signal detections, starting at least one of said signal detections at any arbitrary phase of the received sine wave, each signal detection lasting for a cycle and including: detecting a maximum signal and a minimum signal in one cycle starting from the arbitrary phase; and calculating the signal difference between the maximum and the minimum signals; and summing all the signal differences for the plurality of signal detections to generate a complete detected signal. 11. The detecting method of claim 10 , wherein the maximum signal is detected by a first signal filtering circuit, the first signal filtering circuit includes: a first diode that only allows the positive cycle of the sine wave to pass through; and a first capacitor for holding the maximum signal provided by the first diode during each signal detection. 12. The detecting method of claim 10 , wherein the minimum signal is detected by a second signal filtering circuit, the second signal filtering circuit includes: a second diode that only allows the negative cycle of the sine wave to pass through; and a second capacitor for holding the minimum signal provided by the second diode during each signal detection. 13. The detecting method of claim 10 , wherein the maximum signal is detected by a first signal filtering circuit, the first signal filtering circuit includes: a first capacitor for holding the maximum signal received during each signal detection; a first comparator including a first negative input, a first positive input and a first output, wherein the first positive input receives the sine wave, and the first negative input receives the maximum signal held by the first capacitor; and a first switch for providing the sine wave to the first capacitor according to a signal of the first output when the signal at the first positive input is greater than the signal at the first negative input. 14. The detecting method of claim 10 , wherein the minimum signal is detected by a second signal filtering circuit, the second signal filtering circuit includes: a second capacitor for holding the minimum signal received during each signal detection; a second comparator including a second negative input, a second positive input and a second output, wherein the second negative input receives the sine wave, and the second positive input receives the minimum signal held by the second capacitor; and a second switch for providing the sine wave to the second capacitor according to a signal of the second output when the signal at the second positive input is greater than the signal at the second negative input. 15. A detecting device for suppressing interference of low-frequency noise, comprising: a receiving circuit for receiving a sine wave; a detecting circuit for a plurality of signal detections, starting at least one of said signal detections at any arbitrary phase of the received sine wave, each signal detection lasting for a cycle, wherein the detecting circuit includes: a first signal filtering circuit for filtering out a maximum signal in one cycle starting from the arbitrary phase at each signal detection; a second signal filtering circuit for filtering out a minimum signal in one cycle starting from the arbitrary phase at each signal detection; and a signal difference generating circuit for generating a respective signal difference between the maximum and the minimu

Assignees

Inventors

Classifications

  • Pens or stylus · CPC title

  • by capacitive means · CPC title

  • H03K3/013Primary

    Modifications of generator to prevent operation by noise or interference · CPC title

  • associated with an amplifier (G11C27/028 takes precedence) · CPC title

  • for error correction or compensation, e.g. based on parallax, calibration or alignment · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9577614B2 cover?
The invention detects the difference between the maximum signal and the minimum signal at each of a plurality of cycles separately when a sine wave is received. All differences are summed for generating a single detected signal for suppressing the interference of low-frequency noise. No synchronization with the sine wave is necessary and the detection can start at any phase of the sine wave.
Who is the assignee on this patent?
Egalax_Empia Tech Inc
What technology area does this patent fall under?
Primary CPC classification H03K3/013. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).