Dual inductive element charge pump buck and buck power supplies

Patent metadata

Field	Value
Publication number	US-9577590-B2
Application number	US-201313937618-A
Country	US
Kind code	B2
Filing date	Jul 9, 2013
Priority date	Apr 20, 2010
Publication date	Feb 21, 2017
Grant date	Feb 21, 2017

Abstract

A direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply is disclosed. The charge pump buck power supply includes a charge pump buck converter, a first inductive element, and an energy storage element. The charge pump buck converter and the first inductive element are coupled in series between a DC power supply, such as a battery, and the energy storage element. The buck power supply includes a buck converter, a second inductive element, and the energy storage element. The buck converter and the second inductive element are coupled in series between the DC power supply and the energy storage element. As such, the charge pump buck power supply and the buck power supply share the energy storage element.

First claim

What is claimed is:

1. Circuitry comprising:
a charge pump buck power supply comprising a charge pump buck converter, a first inductive element, and an energy storage element, such that the charge pump buck converter and the first inductive element are coupled in series between a direct current (DC) power supply and the energy storage element; the charge pump buck converter has a first output inductance node and comprises a plurality of shunt pump buck switching elements coupled in series between the first output inductance node and a ground; and the first inductive element is coupled between the first output inductance node and the energy storage element; and
a buck power supply comprising a buck converter, a second inductive element, and the energy storage element, such that:
the buck converter and the second inductive element are coupled in series between the DC power supply and the energy storage element; and
the charge pump buck power supply and the buck power supply share the energy storage element.

2. The circuitry of claim 1 wherein:
during a first converter operating mode, the charge pump buck power supply is adapted to receive and convert a DC power supply signal from the DC power supply to provide a first switching power supply output signal to a load based on a setpoint; and
during a second converter operating mode, the buck power supply is adapted to receive and convert the DC power supply signal from the DC power supply to provide the first switching power supply output signal to the load based on the setpoint, wherein the setpoint is based on a desired voltage of the first switching power supply output signal.

3. The circuitry of claim 2 wherein:
during the second converter operating mode, the charge pump buck power supply is adapted to be disabled; and
during the first converter operating mode, the buck power supply is adapted to be disabled.

4. The circuitry of claim 2 wherein selection of one of the first converter operating mode and the second converter operating mode is based on a voltage of the DC power supply signal and the setpoint, such that the first converter operating mode is selected when the desired voltage of the first switching power supply output signal is greater than the voltage of the DC power supply signal.

5. The circuitry of claim 4 wherein the selection of the one of the first converter operating mode and the second converter operating mode is further based on a load current of the load.

6. The circuitry of claim 5 wherein the second converter operating mode is selected when the desired voltage of the first switching power supply output signal is less than the voltage of the DC power supply signal and the load current is less than a load current threshold.

7. The circuitry of claim 5 wherein the selection of the one of the first converter operating mode and the second converter operating mode is further based on maximizing efficiency.

8. The circuitry of claim 2 further comprising control circuitry and DC-DC control circuitry, such that:
the control circuitry is adapted to provide the setpoint to the DC-DC control circuitry; and
the DC-DC control circuitry is adapted to select one of the first converter operating mode and the second converter operating mode.

9. The circuitry of claim 2 further comprising control circuitry and DC-DC control circuitry, such that the control circuitry is adapted to:
provide the setpoint to the DC-DC control circuitry;
select one of the first converter operating mode and the second converter operating mode; and
provide a DC configuration control signal to the DC-DC control circuitry based on the selection of the one of the first converter operating mode and the second converter operating mode.

10. The circuitry of claim 9 further comprising transceiver circuitry and a DC-DC converter, such that:
the transceiver circuitry provides the control circuitry; and
the DC-DC converter provides the DC-DC control circuitry, the charge pump buck power supply, and the buck power supply.

11. The circuitry of claim 2 further comprising a charge pump adapted to receive and convert the DC power supply signal to provide a second switching power supply output signal.

12. The circuitry of claim 11 wherein:
the first switching power supply output signal is an envelope power supply signal for a first radio frequency (RF) power amplifier (PA); and
the second switching power supply output signal is a bias power supply signal used for biasing the first RF PA.

13. The circuitry of claim 12 further comprising:
the first RF PA comprising:
a first non-quadrature PA path having a first single-ended output; and
a first quadrature PA path coupled between the first non-quadrature PA path and an antenna port, such that the first quadrature PA path has a first single-ended input, which is coupled to the first single-ended output; and
a second RF PA comprising a second quadrature PA path coupled to the antenna port,

wherein the antenna port is configured to be coupled to an antenna.

14. The circuitry of claim 12 further comprising:
the first RF PA, which is a first multi-mode multi-band quadrature RF PA coupled to multi-mode multi-band alpha switching circuitry via a single alpha PA output; and
the multi-mode multi-band alpha switching circuitry having:
a first alpha non-linear mode output associated with a first non-linear mode RF communications band; and
a plurality of alpha linear mode outputs, such that each of the plurality of alpha linear mode outputs is associated with a corresponding one of a first plurality of linear mode RF communications bands.

15. The circuitry of claim 12 further comprising:
the first RF PA comprising a first final stage having a first final bias input, such that bias of the first final stage is via the first final bias input;
PA control circuitry;
a PA-digital communications interface (DCI) coupled between a digital communications bus and the PA control circuitry; and
a final stage current digital-to-analog converter (IDAC) coupled between the PA control circuitry and the first final bias input.

16. The circuitry of claim 12 further comprising:
the first RF PA having a first final stage and adapted to:
receive and amplify a first RF input signal to provide a first RF output signal; and
receive a first final bias signal to bias the first final stage;

PA bias circuitry adapted to receive the bias power supply signal and provide the first final bias signal based on the bias power supply signal; and
a direct current DC-DC converter adapted to receive the DC power supply signal from the DC power supply and provide the bias power supply signal based on the DC power supply signal, such that a voltage of the bias power supply signal is greater than a voltage of the DC power supply signal.

17. The circuitry of claim 12 further comprising:
multi-mode multi-band RF power amplification circuitry having at least a first RF input and a plurality of RF outputs, such that:
the multi-mode multi-band RF power amplification circuitry comprises the first RF PA;
configuration of the multi-mode multi-band RF power amplification circuitry associates one of the at least the first RF input with one of the plurality of RF outputs; and
the configuration is associated with at least a first look-up table (LUT);

PA control circuitry coupled between the multi-mode multi-band RF power amplification circuitry and a PA-digital communications interface (DCI), such that the PA control circuitry has at least the first LUT, which is associated with at least a first

Assignees

• Rf Micro Devices Inc
• Qorvo Us Inc

Inventors

• Levesque Chris
• Berchtold Jean-Christophe
• Colles Joseph Hubert
• Deuchars Robert
• Southcombe William David
• Zimlich David
• Jones David E
• Yoder Scott
• Stockert Terry J

Classifications

• H03F2200/318

  A matching circuit being used as coupling element between two amplifying stages · CPC title

• H03F2200/222

  A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier · CPC title

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

• H03F2200/336

  A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit · CPC title

• H03F2200/414

  A switch being coupled in the output circuit of an amplifier to switch the output on/off · CPC title