Piezoresistive resonator with multi-gate transistor

US9577060B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9577060-B2
Application numberUS-201314778726-A
CountryUS
Kind codeB2
Filing dateJun 29, 2013
Priority dateJun 29, 2013
Publication dateFeb 21, 2017
Grant dateFeb 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

An embodiment includes a first nonplanar transistor including a first fin that includes first source and drain nodes, and a first channel between the first source and drain nodes; a second nonplanar transistor including a second fin that includes second source and drain nodes, and a second channel between the second source and drain nodes; a nonplanar gate on the first fin between the first source and drain nodes and on the second fin between the second source and drain nodes; and first insulation included between the gate and the first fin and second insulation between the gate and the second fin; wherein the gate mechanically resonates at a first frequency when at least one of the gate and the first fin is actuated with alternating current (AC) to produce periodic forces on the gate. Other embodiments are described herein.

First claim

Opening claim text (preview).

What is claimed is: 1. A resonator system comprising: a first nonplanar transistor including a first fin that includes first source and drain nodes, and a first channel between the first source and drain nodes; a second nonplanar transistor including a second fin that includes second source and drain nodes, and a second channel between the second source and drain nodes; and a nonplanar gate on the first fin between the first source and drain nodes and on the second fin between the second source and drain nodes; a direct current (DC) contact, to receive a DC current, coupled to the gate and further coupled to at least one of the first and second fins; and an alternating current (AC) contact, to receive an AC current, coupled to at least one of the gate, the first fin, and the second fin; wherein the first and second fins are not coupled to any other gate between the first source and drain nodes. 2. The system of claim 1 , wherein the DC contact couples to the first fin and the AC contact couples to the gate. 3. The system of claim 2 , wherein the gate mechanically resonates at a first frequency when the gate is actuated with the AC current, from the AC contact, to produce periodic forces on the gate. 4. The system of claim 3 configured to sense the first frequency based on supplying the DC current, from the DC contact, to the first fin while the gate resonates. 5. The system of claim 1 , wherein the DC and AC contacts each couple to the first fin. 6. The system of claim 1 , wherein 1 the DC contact couples to the first and second fins and the AC contact couples to the gate. 7. The system of claim 1 , wherein the DC contact couples to the second fin and the AC contact couples to the first fin. 8. The system of claim 1 comprising AC and DC sources that respectively couple to the AC and DC contacts to provide the AC and DC currents. 9. A resonator system comprising: a first nonplanar transistor including a first fin that includes first source and drain nodes, and a first channel between the first source and drain nodes; a second nonplanar transistor including a second fin that includes second source and drain nodes, and a second channel between the second source and drain nodes; and a nonplanar gate on the first fin between the first source and drain nodes and on the second fin between the second source and drain nodes; wherein (a) the gate mechanically resonates at a first frequency when at least one of the gate and the first fin is actuated with alternating current (AC) to produce periodic forces on the gate, and (b) the first and second fins are not coupled to any other gate between the first source and drain nodes. 10. The system of claim 9 , wherein the first and second fins are adjacent one another and there are no fins under the gate and between the first and second fins. 11. The system of claim 9 , wherein the first frequency is determined based on pitch distance between the first and second fins. 12. The system of claim 9 configured to sense the first frequency based on supplying direct current (DC) to the first fin while the gate resonates; wherein the DC is modulated based on periodic stress within the first fin that is induced by the AC. 13. The system of claim 9 comprising: a third nonplanar transistor including a third fin, which includes third source and drain nodes, and a third channel between the third source and drain nodes, the gate being on the third fin and between the third source and drain nodes; wherein the gate mechanically resonates at the first frequency when at least one of the gate and the third fin is periodically actuated with the AC to produce periodic forces on the gate. 14. The system of claim 13 , wherein the second fin is between the first and third fins and the system is configured to sense the first frequency based on supplying direct current (DC) to the second fin, but not the first and third fins, while the gate resonates. 15. The system of claim 13 , wherein the first frequency is determined based on pitch distance between the first and third fins. 16. The system of claim 9 included in a monolithic substrate that also includes a controller. 17. The system of claim 9 comprising an AC source to supply the AC. 18. The system of claim 9 , wherein the gate includes a long axis perpendicular to long axes of the first and second fins and the gate resonates with longitudinal deflections parallel to the long axis. 19. The system of claim 9 , wherein when the gate mechanically resonates at the first frequency a maximum stress is located at the first fin and not between the first and second fins. 20. The system of claim 9 coupled to a multiplexor including first and second operating modes, wherein the first mode supplies the AC to the first fin but not the second fin, and the second mode supplies the AC to the first and second fins. 21. The system of claim 9 , wherein the gate mechanically resonates at the first frequency when the at least one of the gate and the first fin is actuated with the AC while simultaneously the gate is supplied with direct current (DC). 22. A system on a chip (SoC) comprising: first and second nonplanar transistors including first and second fins; a nonplanar gate on the first and second fins; and a controller formed in a monolithic substrate that also includes the first and second fins; wherein (a) the gate resonates at a first frequency when at least one of the gate and the first fin is actuated with alternating current (AC), and (b) the first and second fins are not coupled to any other gate between the first source and drain nodes. 23. The SoC of claim 22 , wherein the gate resonates at the first frequency when at least one of the gate and the second fin is actuated with the AC. 24. The SoC of claim 22 , wherein the first frequency is determined based on pitch distance between the first and second fins. 25. The SoC of claim 22 configured to sense the first frequency based on supplying direct current (DC) to the first fin while the gate resonates. 26. A method comprising: providing a system on a chip (SoC) having first and second nonplanar transistors including first and second fins; a nonplanar gate on the first and second fins; and a controller formed in a monolithic substrate that also includes the first and second fins; and actuating at least one of the gate and the first fin with alternating current (AC) to induce resonation in the gate at a first frequency; wherein the first and second fins are not coupled to any other gate between the first source and drain nodes. 27. The method of claim 26 comprising: supplying direct current (DC) to the first fin while the gate resonates; modulating the DC based on periodic stress within the first fin that is induced by the AC; and sensing the first frequency based on the modulated DC.

Assignees

Inventors

Classifications

  • comprising FinFETs · CPC title

  • H10D64/512Primary

    Disposition of the gate electrodes, e.g. buried gates · CPC title

  • Driving or detection means · CPC title

  • having a single resonator (crystal tuning forks H03H9/21) · CPC title

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US9577060B2 cover?
An embodiment includes a first nonplanar transistor including a first fin that includes first source and drain nodes, and a first channel between the first source and drain nodes; a second nonplanar transistor including a second fin that includes second source and drain nodes, and a second channel between the second source and drain nodes; a nonplanar gate on the first fin between the first sou…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H10D64/512. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).