Storage apparatus and failure location identifying method

Patent metadata

Field	Value
Publication number	US-9575855-B2
Application number	US-201314357499-A
Country	US
Kind code	B2
Filing date	Sep 6, 2013
Priority date	Sep 6, 2013
Publication date	Feb 21, 2017
Grant date	Feb 21, 2017

Abstract

A storage apparatus has a redundant configuration equipped with a plurality of components and includes a first controller and second controller, wherein the first controller is provided with a first processor and a third processor for monitoring the first controller; wherein the second controller is provided with a second processor and a fourth processor for monitoring the second controller; wherein the first processor and the second processor are connected via a first path and the third processor and the fourth processor are connected via a second path; and wherein if a failure occurs at the first controller, the second processor blocks the first path, acquires failure information including a failure location of the first controller via the third processor, the fourth processor, and the second path, executes first failure location identifying processing, and notifies a management terminal of the failure location.

First claim

The invention claimed is:

1. A storage apparatus comprising a first controller and second controller, which have a redundant configuration equipped with a plurality of components, for controlling data input to and output from a storage device,
wherein the first controller is provided with a first processor for controlling data input to and output from the storage device and a third processor for monitoring the first controller;
wherein the second controller is provided with a second processor for controlling data input to and output from the storage device and a fourth processor for monitoring the second controller;
wherein the first processor and the second processor are connected via a first path and the third processor and the fourth processor are connected via a second path;
wherein the first processor and the second processor communicate with each other at normal time via the first path in response to a response from a host computer and execute processing for inputting and outputting data to and from the storage device;
wherein if a failure occurs at the first controller, the second processor blocks the first path, acquires failure information including a failure location of the first controller via the third processor, the fourth processor, and the second path, executes first failure location identifying processing, and notifies a management terminal of the failure location;
wherein if a failure occurs at the first controller, the first processor acquires the failure information and executes second failure location identifying processing in parallel with the first failure location identifying processing by the second processor; and when either the first failure location identifying processing or the second failure location identifying processing is completed, the first processor notifies the management terminal of the failure location;
wherein the first controller includes a first interrupt controller for having the first processor suspend the processing for inputting and outputting data to and from the storage device at normal time and execute interrupt processing;
wherein the second controller includes a second interrupt controller for having the second processor suspend the processing for inputting and outputting data to and from the storage device at normal time and execute the interrupt processing; and
wherein if a failure occurs at the first controller,
the first processor which has detected the failure notifies the first interrupt controller and the second interrupt controller of detection of the failure, and
the first interrupt controller requests the first processor to execute processing for blocking the first path and the second failure location identifying processing and the second interrupt controller requests the second processor to execute the processing for blocking the first path and the first failure location identifying processing; and
after the first processor or the second processor executes the processing for blocking the first path,
the second processor sends a request for the failure information to the third processor, acquires the failure information from the fourth processor via the second path, and executes the first failure location identifying processing, and
the first processor executes the second failure location identifying processing in parallel with the first failure location identifying processing by the second processor.

2. The storage apparatus according to claim 1 , wherein when either the first failure location identifying processing or the second failure location identifying processing is completed and either the first controller or the second controller notifies the management terminal of the failure location, the failure location identifying processing at the first controller or the second controller which has not completed the failure location identifying processing is terminated.

3. The storage apparatus according to claim 1 , wherein after a failure occurs at the first controller and the first path is blocked, the first processor acquires the failure information and executes the second failure location identifying processing in priority to the first failure location identifying processing; and
if the second failure location identifying processing is not completed after the elapse of a specified period of time, the second processor executes the first failure location identifying processing.

4. The storage apparatus according to claim 3 , wherein the first controller includes a first interrupt controller for having the first processor suspend the processing for inputting and outputting data to and from the storage device at normal time and execute interrupt processing;
wherein the second controller includes a second interrupt controller for having the second processor suspend the processing for inputting and outputting data to and from the storage device at normal time and execute the interrupt processing; and
wherein if a failure occurs at the first controller,
the first processor which has detected the failure notifies the first interrupt controller and the second interrupt controller of detection of the failure, and
the first interrupt controller requests the first processor to execute processing for blocking the first path and the second failure location identifying processing and the second interrupt controller requests the second processor to execute the processing for blocking the first path and the first failure location identifying processing; and
after the first processor or the second processor executes the processing for blocking the first path, the second processor requests the fourth processor to monitor the second failure location identifying processing; and if the second failure location identifying processing is not completed after the elapse of a specified period of time, the second processor executes the first failure location identifying processing.

5. The storage apparatus according to claim 1 , wherein the failure information includes failure isolation information for identifying the failure location and failure log data for analyzing a failure occurrence cause; and
wherein if a failure occurs at the first controller, the third processor acquires the failure information stored in an internal register of the first processor.

6. The storage apparatus according to claim 1 , wherein the first controller includes a first interrupt controller for having the first processor suspend the processing for inputting and outputting data to and from the storage device at normal time and execute interrupt processing;
wherein the second controller includes a second interrupt controller for having the second processor suspend the processing for inputting and outputting data to and from the storage device at normal time and execute the interrupt processing; and
wherein if a failure occurs at the first controller, the first interrupt controller detects the failure information stored in an internal register of the first processor and notifies the second interrupt controller of the failure information.

7. A storage apparatus comprising a first controller and second controller, which have a redundant configuration equipped with a plurality of components, for controlling data input to and output from a storage device,
wherein the first controller is provided with a first processor for controlling data input to and output from the storage device and a third processor for monitoring the first controller;
wherein the second controller is provided with a second processor for controlling data input to and output from the storage device and a fourth processor for monitoring the second controller;
wherein the first processor and the second processor are connected via a first path and the third processor and the fourth

Assignees

• Hitachi Ltd
• Hitachi Ltd

Inventors

• Maeda Toru
• Matsubara Ryosuke

Classifications

• G06F11/2092 Primary

  Techniques of failing over between control units · CPC title

• G06F11/07

  Responding to the occurrence of a fault, e.g. fault tolerance · CPC title

• G06F13/10

  Program control for peripheral devices (G06F13/14 - G06F13/42 take precedence) · CPC title

• G06F11/2017 Primary

  where memory access, memory control or I/O control functionality is redundant (redundant communication control functionality G06F11/2005; redundant storage control functionality G06F11/2089) · CPC title

• G06F2201/805

  Real-time · CPC title