Satellite radio signal receiver, electronic timepiece, date and time information acquiring method and recording medium

Patent metadata

Field	Value
Publication number	US-9575468-B2
Application number	US-201615072632-A
Country	US
Kind code	B2
Filing date	Mar 17, 2016
Priority date	Jun 18, 2015
Publication date	Feb 21, 2017
Grant date	Feb 21, 2017

Abstract

A satellite radio signal receiver includes a receiving section and a processor. The receiving section receives a radio signal from a satellite and demodulates the signal to identify each received bit of the signal. The processor compares the identified received bit with estimated bits which are estimated to be received within a possible deviation range set for a current date and time acquired as a reception time of the received bit, so as to obtain information on comparison result in relation to a deviation from the current date and time. The processor detects the deviation which satisfies a predetermined match condition of comparison results for received bits. The processor acquires date and time information based on the detected deviation which satisfies the predetermined match condition.

First claim

The invention claimed is:

1. A satellite radio signal receiver, comprising:
a receiving section which receives a radio signal from a satellite and demodulates the signal to identify each received bit of the signal; and
a processor;
wherein the processor compares the identified received bit with estimated bits which are estimated to be received within a possible deviation range set for a current date and time acquired as a reception time of the received bit, so as to obtain information on comparison result in relation to a deviation from the current date and time,
wherein the processor detects the deviation which satisfies a predetermined match condition of comparison results for received bits, and
wherein the processor acquires date and time information based on the detected deviation which satisfies the predetermined match condition.

2. The satellite radio signal receiver according to claim 1 ,
wherein the processor generates an estimated bit array which includes the estimated bits within the possible deviation range and identification information which distinguishes the estimated bits from a non-estimated bit in the estimated bit array, and
wherein the processor compares the received bit with the estimated bits based on the identification information.

3. The satellite radio signal receiver according to claim 1 , wherein every time the receiving section identifies a new received bit, the processor compares the new received bit with estimated bits that are within the possible deviation range from a received date and time of the new received bit.

4. The satellite radio signal receiver according to claim 1 , further comprising:
a time counting section which counts the current date and time,
wherein the processor selects the possible deviation range based on an elapsed time since a last correction of the current date and time counted in the time counting section.

5. The satellite radio signal receiver according to claim 2 , further comprising:
a time counting section which counts the current date and time,
wherein the processor selects the possible deviation range based on an elapsed time since a last correction of the current date and time counted in the time counting section.

6. The satellite radio signal receiver according to claim 3 , further comprising:
a time counting section which counts the current date and time,
wherein the processor selects the possible deviation range based on an elapsed time since a last correction of the current date and time counted in the time counting section.

7. The satellite radio signal receiver according to claim 1 , wherein the predetermined match condition is satisfied when a mismatch bit number with respect to a comparison number in comparisons between the received bits and respective estimated bits at a same deviation satisfies a predetermined mismatch tolerance condition.

8. The satellite radio signal receiver according to claim 1 , wherein the predetermined match condition is satisfied when the received bits match respective estimated bits at a same deviation consecutively for a predetermined comparison number threshold or more.

9. The satellite radio signal receiver according to claim 8 , wherein the predetermined comparison number threshold is set so that a match probability that the received bits match the respective estimated bits consecutively for the predetermined comparison number threshold is less than a predetermined threshold value.

10. The satellite radio signal receiver according to claim 9 , wherein the match probability is determined on the assumption that a match probability in each comparison is ½.

11. The satellite radio signal receiver according to claim 1 ,
wherein the receiving section acquires a signal indicator at a predetermined timing, the signal indicator indicating an signal intensity of the radio signal received from the satellite, and
wherein the processor changes the predetermined match condition according to the signal indicator.

12. The satellite radio signal receiver according to claim 11 , wherein the processor selects the match condition such that:
when the signal indicator exhibits such a good value that indicates the signal intensity is equal to or greater than a predetermined intensity threshold, the predetermined match condition is satisfied when the received bits match respective estimated bits at a same deviation consecutively for a predetermined comparison number threshold or more, and
when the signal indicator exhibits such a poor value that indicates the signal intensity is less than the predetermined intensity threshold, the predetermined match condition is satisfied when a mismatch bit number with respect to a comparison number in comparisons between the received bits and respective estimated bits at a same deviation satisfies a predetermined mismatch tolerance condition.

13. The satellite radio signal receiver according to claim 11 , wherein the signal indicator is S/N ratio.

14. The satellite radio signal receiver according to claim 1 , wherein the processor changes the predetermined match condition when no deviation that satisfies the predetermined match condition is detected within a predetermined comparison time limit.

15. The satellite radio signal receiver according to claim 7 , wherein the predetermined mismatch tolerance condition is satisfied when a ratio of a probability of occurrence of a lowest mismatch bit number to a probability of occurrence of a second lowest mismatch bit number is equal to or less than a predetermined value in comparisons that are performed for a predetermined times with respect to each of deviations within the possible deviation range.

16. The satellite radio signal receiver according to claim 15 , wherein the probability of occurrence of the lowest mismatch bit number and the probability of occurrence of the second lowest mismatch bit number are determined on assumption that each binary value occurs evenly with a probability of ½ in all bits.

17. The satellite radio signal receiver according to claim 7 , wherein determination as to whether the predetermined mismatch tolerance condition is satisfied is made every predetermined transmission cycle of a bit array that is transmitted according to a signal transmission format of the satellite.

18. An electronic timepiece, comprising:
the satellite radio signal receiver according to claim 1 ;
a time counting section which counts a current date and time;
an electronic timepiece processor which corrects the date and time counted in the time counting section by using the date and time information acquired by the processor; and
a display section which displays the date and time counted in the time counter section.

19. A method of acquiring date and time information in a satellite radio signal receiver which comprises a receiving section which receives a radio signal from a satellite and demodulates the signal to identify each received bit of the signal, comprising the steps of:
a comparison step of comparing the identified received bit with estimated bits which are estimated to be received within a possible deviation range estimated from a current date and time acquired as a reception time of the received bit, so as to obtain information on comparison result in relation to a deviation from the current date and time;
a deviation detecting step of detecting the deviation which satisfies a predetermined match condition of comparison results for received bits; and
a date and time acquiring step of acquiring date and time information based on the detected d

Assignees

• Casio Computer Co Ltd

Inventors

• Matsue Takeshi
• Abe Hideo

Classifications

• G01S19/256

  relating to timing, e.g. time of week, code phase, timing offset · CPC title

• G04R20/06

  Decoding time data; Circuits therefor · CPC title

• G04R20/04 Primary

  Tuning or receiving; Circuits therefor · CPC title

• G01S19/14

  specially adapted for specific applications · CPC title

• G01S19/34

  Power consumption · CPC title