Testing stacked devices

Patent metadata

Field	Value
Publication number	US-9575117-B2
Application number	US-201313865937-A
Country	US
Kind code	B2
Filing date	Apr 18, 2013
Priority date	Apr 18, 2013
Publication date	Feb 21, 2017
Grant date	Feb 21, 2017

Abstract

Testing stacked devices. In accordance with a first method embodiment, a primary circuit assembly is accessed from a first circuit assembly carrier. The primary circuit assembly is placed into a test fixture. A secondary circuit assembly is accessed from a second circuit assembly carrier. The secondary circuit assembly is placed into the test fixture on top of the primary circuit assembly. The primary circuit assembly is tested in conjunction with said secondary circuit assembly while coupled together.

First claim

What is claimed is:

1. An electronically controlled method performed by a computerized testing system, said method comprising:
accessing a primary circuit assembly from a first circuit assembly carrier;
placing said primary circuit assembly into a test fixture;
accessing a secondary circuit assembly from a second circuit assembly carrier via a pick and place apparatus;
placing said secondary circuit assembly into said test fixture on top of said primary circuit assembly via said pick and place apparatus,
wherein said pick and place apparatus maintains contact with said secondary circuit assembly during and after said placing, and applies a force to said secondary circuit assembly sufficient for said secondary circuit assembly to electrically couple to said primary circuit assembly; and
testing said primary circuit assembly in conjunction with said secondary circuit assembly while coupled together while said pick and place apparatus applies said force.

2. The method of claim 1 wherein said force is sufficient for said primary circuit assembly to electrically couple to said test fixture.

3. The method of claim 1 further comprising:
removing said primary circuit assembly from said test fixture; and
placing said primary circuit assembly in a retainer according to results of said testing.

4. The method of claim 3 wherein said retainer is separate from said first circuit assembly carrier.

5. The method of claim 1 further comprising:
removing said secondary circuit assembly from said test fixture; and
placing said secondary circuit assembly in a retainer according to results of said testing.

6. The method of claim 1 wherein said secondary circuit assembly is retained by a removal mechanism for testing with a different instance of a primary circuit assembly.

7. A computer controlled method performed by a testing system, said method comprising:
accessing a primary circuit assembly from a first circuit assembly carrier by a first pick and place arm;
placing said primary circuit assembly into a test fixture by said first pick and place arm;
accessing a secondary circuit assembly from a second circuit assembly carrier by a second pick and place arm;
placing said secondary circuit assembly into said test fixture on top of said primary circuit assembly by said second pick and place arm
wherein said placing said secondary circuit assembly comprises said second pick and place arm maintaining contact with and applying force to said secondary circuit assembly sufficient for said secondary circuit assembly to electrically couple to said primary circuit assembly; and
testing said primary circuit assembly in conjunction with said secondary circuit assembly while coupled together.

8. The method of claim 7 wherein said force is sufficient for said primary circuit assembly to electrically couple to said test fixture.

9. The method of claim 7 further comprising:
removing said primary circuit assembly from said test fixture via said first pick and place arm; and
placing said primary circuit assembly in a retainer according to results of said testing.

10. The method of claim 9 wherein said retainer is separate from said first circuit assembly carrier.

11. The method of claim 7 further comprising:
removing said secondary circuit assembly from said test fixture via said second pick and place arm; and
placing said secondary circuit assembly in a retainer according to results of said testing.

12. The method of claim 7 wherein said secondary circuit assembly is retained by said second pick and place arm for testing with a different instance of a primary circuit assembly.

13. An apparatus comprising:
a test fixture configured to retain an integrated circuit assembly during testing,
wherein said integrated circuit assembly comprises an integrated circuit package;
first and second circuit assembly carriers for holding at least two different designs of integrated circuit;
a first pick and place arm configured for moving a first integrated circuit assembly between said test fixture and said first circuit assembly carrier;
a second pick and place arm configured for moving a second integrated circuit assembly between said test fixture and said second circuit assembly carrier, and
wherein said second pick and place arm is configured for applying force to said second integrated circuit assembly sufficient for said second integrated circuit assembly to make electrical contact with said first integrated circuit assembly, and for said first integrated circuit assembly to make electrical contact with contact of said test fixture.

14. The apparatus of claim 13 wherein said integrated circuit package is configured to be part of a Package on Package.

15. The apparatus of claim 13 wherein said second pick and place arm is configured to retain said second integrated circuit assembly after testing of said first and second integrated circuit assemblies, and to place said second integrated circuit assembly onto another instance of said first integrated circuit assembly.

Assignees

• Advantest Corp

Inventors

• Qi Ling
• Hsieh Tung Sheng

Classifications

• G01R31/2893 Primary

  Handling, conveying or loading, e.g. belts, boats, vacuum fingers (G01R31/2867 takes precedence; handling semiconductor devices or wafers during manufacture or treatment H10P72/00) · CPC title