Out-of plane travel restriction structures

US9571008B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9571008-B2
Application numberUS-201114112091-A
CountryUS
Kind codeB2
Filing dateJun 28, 2011
Priority dateJun 28, 2011
Publication dateFeb 14, 2017
Grant dateFeb 14, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure includes structures and methods of forming structures for restricting out-of-plane travel. One example of forming such structures includes providing a first wafer 100, 220 comprising a bond layer of a particular thickness 101, 221 on a surface of a substrate material 105, 225, removing the bond layer 101, 221 in a first area 103 - 1, 103 - 2, 223 to expose the surface of the substrate material 105, 225, applying a mask to at least a portion of a remaining bond layer 109 - 1, 109 - 4, 229 - 1, 229 - 3 and a portion of the exposed surface of the substrate material in the first area 109 - 2, 109 - 3, 229 - 2 to form a second area exposed on the surface of the substrate material 105, 225, etching the second area to form a cavity 110, 230 in the substrate material 105, 225 and the bond layer 101, 221, and forming by the etching, in the cavity 110, 230, a structure 113 - 1, 113 - 2, 233 for restricting out-of-plane travel, where the structure 113 - 1, 113 - 2, 233 has a particular height from a bottom of the cavity 115, 235 determined by the particular thickness of the bond layer 101, 221.

First claim

Opening claim text (preview).

What is claimed: 1. A method of forming a structure for restricting out-of-plane travel, the method comprising: providing a first wafer comprising a bond layer of a particular thickness on a surface of a first substrate material; removing the bond layer in a first area to expose the surface of the first substrate material; applying a mask to at least a portion of a remaining bond layer and a portion of the exposed surface of the first substrate material in the first area to form a second area exposed on the surface of the first substrate material; etching the second area to form a cavity in the first substrate material and the bond layer; and forming by the etching, in the cavity, the structure for restricting out-of-plane travel, wherein the structure has a particular height from a bottom of the cavity determined by the particular thickness of the bond layer. 2. The method of claim 1 , including the cavity having a particular depth determined from the bottom of the cavity to a top surface of the bond layer. 3. The method of claim 2 , including determining the particular height of the structure from the bottom of the cavity by determining a difference between the particular thickness of the bond layer and the particular depth of the cavity. 4. The method of claim 1 , including removing the mask to expose a top surface of the bond layer and a top of the structure for restricting out-of-plane travel. 5. The method of claim 4 , including bonding a second wafer to the top surface of the bond layer. 6. The method of claim 5 , including forming, for a microelectromechanical structure (MEMS), a proof mass, a flexure suspension, and an anchoring frame by etching through the second wafer. 7. The method of claim 6 , including using electrodes for detecting movement of the proof mass from a resting position in an xy plane of the second wafer by capacitive coupling. 8. The method of claim 7 , including restricting the out-of-plane travel of the proof mass in a z direction such that the travel is restricted to the particular thickness of the bond layer by the particular height of the structure. 9. A microelectromechanical structure (MEMS), comprising: a wafer comprising a bond layer of a particular thickness on a surface of a first substrate material, wherein the bond layer is absent in a number of first areas to expose the surface of the substrate material; a removable mask applied to cover at least a portion of a remaining bond layer and a portion of the exposed surface of the substrate material in the number of first areas to form a number of uncovered second areas exposed on the surface of the substrate material; a cavity formed by an etch in an uncovered portion of the remaining bond layer and the number of uncovered second areas of the substrate material; and a number of structures in the cavity formed by the etch for restricting out-of-plane travel of a proof mass, wherein each of the number of structures has a particular height from a bottom of the cavity determined by the particular thickness of the bond layer. 10. The MEMS of claim 9 , wherein the particular thickness of the bond layer is in a range of from 0.5 micrometer to 3.0 micrometers. 11. The MEMS of claim 9 , wherein the bond layer is formed to a predetermined thickness with materials that are bondable to the first wafer that are selected from a group that includes dielectrics or metals that are deposited or thermally grown on the surface of the first wafer. 12. The MEMS of claim 9 , wherein the number of structures formed for restricting out-of-plane travel of the proof mass include a plurality of pillars positioned in a central region of the cavity interior to a periphery of the proof mass. 13. The MEMS of claim 12 , wherein the plurality of pillars each have the particular height in a range of from 25 micrometers to 450 micrometers and a particular width, corresponding to a width of the mask, in a range of from 150 micrometers to 250 micrometers. 14. A microelectromechanical structure (MEMS), comprising: a wafer comprising a bond layer of a particular thickness on a surface of a substrate material, wherein the bond layer is absent in a central area of the first wafer to expose the surface of the substrate material; a mask applied to cover all of a remaining bond layer and cover an adjacent portion of the exposed surface of the substrate material in the central area to form an uncovered second area exposed on the surface of the substrate material; a cavity formed by an etch in the uncovered second area of the substrate material; and a number of shoulders in the cavity formed by the etch for restricting out-of-plane travel of a proof mass, wherein each of the number of shoulders has a particular height from a bottom of the cavity determined by the particular thickness of the bond layer. 15. The MEMS of claim 14 , wherein the number of shoulders formed for restricting out-of-plane travel each includes a particular width at the periphery of the cavity in a range of from 150 micrometers to 250 micrometers to overlap a boundary of the proof mass while in a rest position.

Assignees

Inventors

Classifications

  • For holding or placing an element in a given position · CPC title

  • Accelerometers · CPC title

  • Translation according to an axis perpendicular to the substrate · CPC title

  • H02N1/00Primary

    Electrostatic generators or motors using a solid moving electrostatic charge carrier · CPC title

  • using stopper structures for limiting the travel of the seismic mass · CPC title

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Frequently asked questions

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What does patent US9571008B2 cover?
The present disclosure includes structures and methods of forming structures for restricting out-of-plane travel. One example of forming such structures includes providing a first wafer 100, 220 comprising a bond layer of a particular thickness 101, 221 on a surface of a substrate material 105, 225, removing the bond layer 101, 221 in a first area 103 - 1, 103 - 2, 223 to expose the…
Who is the assignee on this patent?
Milligan Donald J, Alley Rodney L, Hartwell Peter G, and 2 more
What technology area does this patent fall under?
Primary CPC classification H02N1/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).