Intelligent gate drive voltage generator

Patent metadata

Field	Value
Publication number	US-9570985-B2
Application number	US-82997510-A
Country	US
Kind code	B2
Filing date	Jul 2, 2010
Priority date	Jul 2, 2010
Publication date	Feb 14, 2017
Grant date	Feb 14, 2017

Abstract

According to an embodiment of the invention, an apparatus includes a microprocessor-based pulse-width modulation controller configured to generate a pulse-width modulation signal, and a synchronous converter including a first transistor, a second transistor, a first driver, and a second driver. The apparatus further includes a drive voltage generator configured to generate a drive voltage for the synchronous converter. The drive voltage generator is further configured to generate the drive voltage based on a measured output current and a measured input voltage.

First claim

We claim:

1. An apparatus, comprising:
a DC-DC converter comprising a pulse-width modulation (PWM) generator that generates a first PWM signal;
wherein the DC-DC converter is configured to generate an output voltage that depends on a first input voltage to the DC-DC converter and a duty cycle of the first PWM signal;
a device for measuring the first input voltage at a point in time;
a device for measuring an output current of the DC-DC converter at the point in time;
a processor based PWM controller that calculates a second duty cycle as a function of the measured first input voltage and the measured output current of the DC-DC converter;
wherein the processor based PWM controller is configured to generate a second PWM signal having the second duty cycle;
a boost converter coupled to receive the second PWM signal and configured to generate a drive voltage for the DC-DC converter,
wherein a magnitude of the drive voltage depends on the second duty cycle of the second PWM signal.

2. The apparatus of claim 1 wherein the DC-DC converter comprises a first transistor, a second transistor, a first driver, and a second driver, wherein the first driver is configured to receive the drive voltage, and wherein the first driver is configured to drive a gate of the first transistor using the drive voltage.

3. The apparatus of claim 1 , wherein the second duty cycle of the second PWM signal depends on a measured switching frequency of the DC-DC converter.

4. The apparatus of claim 1 , wherein the second duty cycle of the second PWM signal depends on a measured temperature of the DC-DC converter.

5. The apparatus of claim 1 wherein the boost converter comprises an inductor, a diode, a capacitor, and a transistor, and wherein the transistor is configured to receive the second PWM signal at a gate thereof.

6. The apparatus of claim 5 wherein the transistor is configured to receive a second input voltage that is different from the first input voltage, and wherein the magnitude of the drive voltage depends on the second input voltage.

7. A method, comprising:
generating a first PWM signal having a first duty cycle;
a first DC-DC converter generating an output voltage with a magnitude that depends on a first input voltage and the first duty cycle of the first PWM signal;
measuring the first input voltage and an output current of the first DC-DC converter at a first point in time;
calculating a second duty cycle using the first input voltage and the output current measured at the first point in time;
generating a second PWM signal having the calculated second duty cycle;
a second DC-DC converter generating a drive voltage for the first DC-DC converter wherein a magnitude of the drive voltage depends on the second duty cycle of the second PWM signal.

8. The method of claim 7 , wherein the first DC-DC converter comprises a first transistor, a second transistor, a first driver, and a second driver.

9. The method of claim 7 , wherein the second duty cycle of the second PWM signal depends on a switching frequency of the first DC-DC converter.

10. The method of claim 7 , wherein the second duty cycle of the second PWM signal depends on a temperature of the first DC-DC converter.

11. The method of claim 7 further comprising:
measuring the first input voltage and the output current of the DC-DC converter at another point in time;
calculating a third duty cycle using the first input voltage and the output current measured at the other point in time, wherein the first and second duty cycles are different;
generating a third PWM signal having the calculated third duty cycle;
the second DC-DC converter generating a second drive voltage for the first DC-DC converter wherein a magnitude of the second drive voltage depends on the third duty cycle.

12. The method of claim 7 wherein the second DC-DC converter comprises a boost converter.

13. A method comprising:
a battery generating a first voltage that drops as the battery discharges;
a first DC-DC converter generating an output voltage with a magnitude that varies with a first duty cycle of a first PWM signal;
a processor based controller generating a second duty cycle that increases as the first voltage decreases;
the processor based controller generating a second PWM signal having the second duty cycle;
a second DC-DC converter generating a drive voltage for the first DC-DC converter, wherein a magnitude of the drive voltage increases as the second duty cycle increases.

14. The method of claim 13 , wherein the second duty cycle of the second PWM signal depends on a switching frequency of the first DC-DC converter.

15. The method of claim 14 , wherein the second duty cycle of the second PWM signal depends on a temperature of the first DC-DC converter.

16. The method of claim 15 , wherein the second duty cycle of the second PWM signal depends on an output current of the first DC-DC converter.

17. The method of claim 13 wherein the second duty cycle is zero when the battery is fully charged, and wherein the second duty cycle is greater than zero when the battery is not fully charged.

18. The method of claim 17 wherein the second DC-DC converter comprises a boost converter, wherein the boost converter comprises a transistor that is controlled by the second PWM signal.

Assignees

• Sato Tetsuo
• Comstock Jim
• Kudo Ryotaro
• Koyano Masashi
• Renesas Electronics America Inc

Inventors

• Sato Tetsuo
• Comstock Jim
• Kudo Ryotaro
• Koyano Masashi

Classifications

• A61P25/32

  Alcohol-abuse · CPC title

• H02M3/1588 Primary

  comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence) · CPC title

• A61P25/30

  for treating abuse or dependence · CPC title

• H02M2001/0022

  Electricity · mapped topic

• H02M2001/0019

  Electricity · mapped topic