Point of load regulator synchronization and phase offset

Patent metadata

Field	Value
Publication number	US-9570983-B2
Application number	US-201414258235-A
Country	US
Kind code	B2
Filing date	Apr 22, 2014
Priority date	Apr 22, 2014
Publication date	Feb 14, 2017
Grant date	Feb 14, 2017

Abstract

An electronic system includes a multiple POL regulators that supply a regulated voltage to a component within the electronic system. A phase spreading scheme may be implemented so that the POL regulators operate under various phases to reduce voltage noise, high input capacitance, and high radiated emissions. One phase spreading scheme includes a single POL regulator controlling phase spreading so that the other POL regulators operate under different phases. Another phase spreading scheme includes an upstream POL regulator determining a phase offset that may be passed to a downstream POL regulator so that the downstream POL regulator may operate under a different phase relative to the upstream POL regulator.

First claim

What is claimed is:

1. An electronic system including at least three point of load (POL) regulators that supply a regulated voltage to a component within the electronic system, the electronic system comprising:
a master POL regulator comprising a first SYNC OUT pin and a second SYNC out pin;
a first controlled POL regulator comprising a SYNC IN pin communicatively connected to the first SYNC OUT pin of the master POL regulator, and;
a second controlled POL regulator comprising a SYNC IN pin communicatively connected to the second SYNC OUT pin of the master POL regulator,
wherein the master POL regulator operates under a reference phase and communicates a first SYNC OUT signal upon the first SYNC OUT pin that is offset from the reference phase by a first phase offset and communicates a second SYNC OUT signal upon the second SYNC OUT pin that is offset from the reference phase by a second phase offset.

2. The electronic system of claim 1 , wherein the master POL regulator further comprises an internal clock to which the master POL regulator synchronizes the reference phase.

3. The electronic system of claim 1 , wherein the master POL regulator further comprises an SYNC IN pin to receive an external clock signal to which the master POL regulator synchronizes the reference phase.

4. The electronic system of claim 1 , wherein the first SYNC OUT signal is a first oscillator signal that is offset from the reference phase by the first phase offset.

5. The electronic system of claim 1 , wherein the second SYNC OUT signal is a second oscillator signal that is offset from the reference phase by the second phase offset.

6. An electronic system including at least three point of load (POL) regulators that supply a regulated voltage to a component within the electronic system, the electronic system comprising:
a first POL regulator comprising a first SYNC OUT pin, wherein the first POL regulator operates under a first phase and communicates a first SYNC OUT signal upon the first SYNC OUT pin that is offset from the first phase by a downstream phase offset;
a second POL regulator comprising a second SYNC OUT pin and a SYNC IN pin communicatively connected to the first SYNC OUT pin of the first POL regulator, wherein the second POL regulator operates under a second phase synced to the first SYNC OUT signal and communicates a second SYNC OUT signal upon the second SYNC OUT pin that is offset from the second phase by the downstream phase offset, and;
a third POL regulator comprising a third SYNC OUT pin and a SYNC IN pin communicatively connected to the second SYNC OUT pin of the second POL regulator.

7. The electronic system of claim 6 , wherein the first POL regulator further comprises an internal clock to which the first POL regulator synchronizes the first phase.

8. The electronic system of claim 6 , wherein the first POL regulator further comprises an SYNC IN pin to receive an external clock signal to which the first POL regulator synchronizes the first phase.

9. A phase spreading method for an electronic system including at least three point of load (POL) regulators that supply a regulated voltage to a component within the electronic system, the phase spreading method comprising:
synchronizing, with a master POL regulator comprising a first SYNC OUT pin and a second SYNC out pin, a reference phase to a clock;
determining, with the master POL regulator, a first phase offset and a second phase offset;
communicating, with the master POL regulator, a first SYNC OUT signal upon the first SYNC OUT pin that is offset from the reference phase by the first phase offset, and;
communicating, with the master POL regulator, a second SYNC OUT signal upon the second SYNC OUT pin that is offset from the reference phase by the second phase offset.

10. The phase spreading method of claim 9 , further comprising:
receiving, with a first controlled POL regulator, the first SYNC OUT signal upon a SYNC IN pin.

11. The phase spreading method of claim 10 , further comprising:
receiving, with a second controlled POL regulator, the second SYNC OUT signal upon a SYNC IN pin.

12. The phase spreading method of claim 9 , wherein the clock to which the master POL regulator synchronizes the reference phase is comprised within the master POL regulator.

13. The phase spreading method of claim 9 , wherein the clock to which the master POL regulator synchronizes the reference phase is external to the master POL regulator.

14. The phase spreading method of claim 9 , wherein determining the first phase offset and the second phase offset further comprises:
determining, with the master POL regulator, the quantity of controlled POL regulators.

15. The phase spreading method of claim 14 , wherein determining the first phase offset further comprises:
dividing, with the master POL regulator, the quantity of controlled POL regulators by 360° multiplied by an iteration value associated with the first phase.

16. The phase spreading method of claim 14 , wherein determining the second phase offset further comprises:
dividing, with the master POL regulator, the quantity of controlled POL regulators by 360° multiplied by an iteration value associated with the second phase.

17. The phase spreading method of claim 9 , wherein the first SYNC OUT signal is an first oscillator signal that is offset from the reference phase by the first phase offset and the second SYNC OUT signal is an second oscillator signal that is offset from the reference phase by the second phase offset.

18. The phase spreading method of claim 17 , wherein the first oscillator signal is offset from the reference phase and the second oscillator signal is offset from the first oscillator signal by a similar degree.

Assignees

• IBM

Inventors

• Baker Anthony E
• Dignam Don R
• Hum Harvey
• Meng Jian

Classifications

• H02M3/1584 Primary

  with a plurality of power processing stages connected in parallel · CPC title

• H02M2003/1586

  Electricity · mapped topic

• H02M3/1586

  switched with a phase shift, i.e. interleaved · CPC title

• H02M3/04 Primary

  by static converters · CPC title