Integrated circuit with electrostatic discharge protection
US-2024395801-A1 · Nov 28, 2024 · US
Voltage clamping circuit
US9570906B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9570906-B2 |
| Application number | US-201514677921-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 2, 2015 |
| Priority date | Nov 4, 2014 |
| Publication date | Feb 14, 2017 |
| Grant date | Feb 14, 2017 |
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- Title
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Abstract
Official abstract text for this publication.
A voltage supply for providing a clamped voltage to a circuit element to be protected against electrical overstress (EOS) has a reference voltage module and a voltage clamp module. The reference voltage module has a first field-effect transistor (FET) whose source and drain are connected in series between a programmable reference current source and a first resistor across a power supply. The gate of the first FET is connected to its drain to provide a reference voltage defined by the reference current flowing in the first resistor. The voltage clamp module has a second FET whose gate receives the reference voltage and whose source is connected to provide to the protected circuit element the clamped voltage whose variation is limited by the reference voltage.
First claim
Opening claim text (preview).
The invention claimed is: 1. A voltage supply for providing a clamped voltage to a circuit element to be protected against electrical overstress (EOS), comprising: a reference voltage module including a first active element having a first control terminal and first current carrying terminals, the first current carrying terminals being connected in series between a reference current source that provides a reference current and a first impedance across a power supply, and the first…
Assignees
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Classifications
Electricity · mapped topic
- H02H9/046Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9570906B2 cover?
- A voltage supply for providing a clamped voltage to a circuit element to be protected against electrical overstress (EOS) has a reference voltage module and a voltage clamp module. The reference voltage module has a first field-effect transistor (FET) whose source and drain are connected in series between a programmable reference current source and a first resistor across a power supply. The ga…
- Who is the assignee on this patent?
- Wang Zhengxiang, Wang Yang, Freescale Semiconductor Inc
- What technology area does this patent fall under?
- Primary CPC classification H02H9/046. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).