Display device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9570616-B2
Application number	US-201615069043-A
Country	US
Kind code	B2
Filing date	Mar 14, 2016
Priority date	May 4, 2015
Publication date	Feb 14, 2017
Grant date	Feb 14, 2017

Abstract

A display device includes: a first substrate; a gate electrode on the first substrate; a gate insulating layer on the gate electrode; a semiconductor layer on the gate insulating layer; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a first passivation layer including a silicon nitride-based material and on the semiconductor layer, the source electrode, and the drain electrode; a second passivation layer including a silicon nitride-based material and on the first passivation layer; and a third passivation layer including a silicon nitride-based material and on the second passivation layer, where a content ratio of silicon in the first passivation layer is higher than a content ratio of silicon in the second passivation layer, and the content ratio of silicon in the second passivation layer is higher than a content ratio of silicon in the third passivation layer.

First claim

What is claimed is:

1. A display device comprising:
a first substrate;
a gate electrode on the first substrate;
a gate insulating layer on the gate electrode;
a semiconductor layer on the gate insulating layer;
a source electrode on the semiconductor layer;
a drain electrode on the semiconductor layer and spaced apart from the source electrode;
a first passivation layer on the semiconductor layer, the source electrode and the drain electrode, wherein the first passivation layer comprises a silicon nitride-based material;
a second passivation layer on the first passivation layer, wherein the second passivation layer comprises a silicon nitride-based material; and
a third passivation layer on the second passivation layer, wherein the third passivation layer comprises a silicon nitride-based material,
wherein
a content ratio of silicon in the first passivation layer is higher than a content ratio of silicon in the second passivation layer, and
the content ratio of silicon in the second passivation layer is higher than a content ratio of silicon in the third passivation layer.

2. The display device of claim 1 , wherein the silicon nitride-based material of the first passivation layer comprises a composition of SiN x , wherein x satisfies the following inequation: 0.1≦x≦0.4.

3. The display device of claim 1 , wherein
the silicon nitride-based material of the second passivation layer comprises a composition of SiN y , wherein y satisfies the following inequation: 0.7≦y≦1.5, and
the silicon nitride-based material of the third passivation layer comprises a composition of SiN z , wherein z satisfies the following inequation: 15≦z≦25.

4. The display device of claim 1 , wherein
the silicon nitride-based material of the first passivation layer comprises a Si—H group and a N—H group, and
a content ratio of the N—H group to the Si—H group is in a range of about 0.1 to about 0.4.

5. The display device of claim 1 , wherein the first passivation layer has a thickness in a range of about 15 nanometers to about 30 nanometers.

6. The display device of claim 1 , wherein a gate-off voltage in a range of about −4.9 volts to about −2.7 volts is applied to the gate electrode.

7. The display device of claim 1 , further comprising:
a first electrode on the first substrate,
wherein the first electrode is connected to the drain electrode.

8. The display device of claim 7 , further comprising:
a color filter between the third passivation layer and the first electrode.

9. The display device of claim 7 , further comprising:
a second substrate on the first electrode and opposite to the first substrate; and
a liquid crystal layer between the first substrate and the second substrate.

10. The display device of claim 7 , further comprising:
a light emitting layer on the first electrode; and
a second electrode on the light emitting layer.

11. A method of manufacturing a display device, the method comprising:
providing a gate electrode on a first substrate of the display device;
providing a gate insulating layer on the gate electrode;
providing a semiconductor layer on the gate insulating layer;
providing a source electrode and a drain electrode on the semiconductor layer to be spaced apart from each other;
providing a first passivation layer on the semiconductor layer, the source electrode and the drain electrode, wherein the first passivation layer comprises a silicon-nitride material;
providing a second passivation layer on the first passivation layer, wherein the second passivation layer comprises a silicon-nitride material; and
providing a third passivation layer on the second passivation layer, wherein the third passivation layer comprises a silicon-nitride material,
wherein a content ratio of silicon in the first passivation layer is higher than a content ratio of silicon of the second passivation layer, and
the content ratio of silicon in the second passivation layer is higher than a content ratio of silicon in the third passivation layer.

12. The method of claim 11 , wherein each of the providing the first passivation layer, the providing the second passivation layer, and the providing the third passivation layer comprises performing a deposition process using NH 3 gas, SiH 4 gas and N 2 gas.

13. The method of claim 11 , wherein
the silicon-nitride material of the first passivation layer comprises a composition of SiN x , wherein x satisfies the following inequation: 0.1≦x≦0.4.

14. The method of claim 11 , wherein
the silicon-nitride material of the second passivation layer comprises a composition of SiN y , wherein y satisfies the following inequation: 0.7≦y≦1.5, and
the silicon-nitride material of the third passivation layer comprises a composition of SiN z , wherein z satisfies the following inequation: 15≦z≦25.

15. The method of claim 11 , further comprising:
disposing a second substrate to face the first substrate; and
providing a liquid crystal layer between the first substrate and the second substrate.

16. A semiconductor device comprising:
a first substrate;
a gate electrode on the first substrate;
a gate insulating layer on the gate electrode;
a semiconductor layer on the gate insulating layer;
a source electrode on the semiconductor layer;
a drain electrode on the semiconductor layer and spaced apart from the source electrode;
a first passivation layer on the semiconductor layer, the source electrode and the drain electrode, wherein the first passivation layer comprises a silicon nitride-based material;
a second passivation layer on the first passivation layer, wherein the second passivation layer comprises a silicon nitride-based material; and
a third passivation layer on the second passivation layer, wherein the third passivation layer comprises a silicon nitride-based material,
wherein a content ratio of silicon in the first passivation layer is higher than a content ratio of silicon in the second passivation layer, and
the content ratio of silicon in the second passivation layer is higher than a content ratio of silicon in the third passivation layer.

17. The semiconductor device of claim 16 , wherein
the silicon nitride-based material of the first passivation layer comprises a composition of SiN x , wherein x satisfies the following inequation: 0.1≦x≦0.4.

18. The semiconductor device of claim 16 , wherein
the silicon nitride-based material of the second passivation layer comprises a composition of SiN y , wherein y satisfies the following inequation: 0.7≦y≦1.5, and
the silicon nitride-based material of the third passivation layer comprises a composition of SiN z , wherein z satisfies the following inequation: 15≦z≦25.

19. The semiconductor device of claim 16 , wherein the first passivation layer has a thickness in a range of about 15 nanometers to about 30 nanometers.

20. The semiconductor device of claim 16 , wherein the semiconductor layer comprises a silicon-based semiconductor.

Assignees

• Samsung Display Co Ltd

Inventors

• Chung Yungbin
• Cho Seungkyeng
• Baek Chulhyun
• CHOI Injun
• JEON Bogeon
• CHO Eunjeong
• Yang Sunghoon

Classifications

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10W74/137

  the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title

• H10W74/43

  comprising oxides, nitrides or carbides, e.g. ceramics or glasses · CPC title

• H01L27/322

  Electricity · mapped topic

• H01L27/1262

  Electricity · mapped topic