Read disturb detection

US9570198B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9570198-B2
Application numberUS-201514602151-A
CountryUS
Kind codeB2
Filing dateJan 21, 2015
Priority dateMay 16, 2014
Publication dateFeb 14, 2017
Grant dateFeb 14, 2017

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  5. First independent claim

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Abstract

Official abstract text for this publication.

It is determined that a read count has reached one of a set of read count thresholds. An initial test page which corresponds to the read count threshold that has been reached is selected from a set of initial test pages. There is at least one page that is not in the set of initial test pages and is victimized by an offending page that also victimizes a page in the set of initial test pages. A test read is performed on the selected test page and the results of the test read of the selected test page are evaluated for read disturb noise.

First claim

Opening claim text (preview).

What is claimed is: 1. A system, comprising: a test controller configured to: determine that a read count of a block has reached one of a set of read count thresholds for the block, each read count threshold of the set of thresholds corresponding to an initial test page in a set of initial test pages; and select, from the set of initial test pages, the initial test page which corresponds to the reached read count threshold, and a memory interface configured to perform a test read on the selected test page; the test controller further configured to evaluate results of the performed test read on the selected initial test page for read disturb noise; wherein the initial test pages in the set of initial test pages are configured to be tested first in test reads that evaluate read disturb noise, and wherein each page in the set of initial test pages victimizes a page not included in the set of initial test pages and victimizes another page included in the set of initial test pages. 2. The system recited in claim 1 , wherein the system includes a semiconductor device, including one or more of the following: an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). 3. The system recited in claim 1 , further comprising a solid state storage, wherein: a first semiconductor device includes the test controller and the memory interface; and the solid state storage is located at least in part on a second semiconductor device. 4. The system recited in claim 3 , further comprising a plurality of blocks, wherein the plurality of blocks is able to be accessed simultaneously. 5. The system recited in claim 1 , wherein the test controller is configured to evaluate, including by: performing error correction decoding on test read data from the performed test read; determining a number of bit errors by comparing corrected data from the performed error correction decoding against the test read data; determining if the number of bit errors is greater than a bit error threshold; and when it is determined that the number of bit errors is greater than the bit error threshold, declaring that read disturb noise has been detected. 6. The system recited in claim 1 , further comprising a garbage collector configured to perform garbage collection on a group that includes the selected page when read disturb noise is detected in the selected initial test page. 7. A method, comprising: determining that a read count of a block has reached one of a set of read count thresholds for the block, each read count threshold of the set of thresholds corresponding to an initial test page in a set of initial test pages; selecting, from the set of initial test pages, the initial test page which corresponds to the reached read count threshold; performing a test read on the selected initial test page; and using a processor to evaluate results of the performed test read on the selected test page for read disturb noise, wherein the initial test pages in the set of initial test pages are configured to be tested first in test reads that evaluate read disturb noise; and wherein each page in the set of initial test pages victimizes a page not included in the set of initial test pages and victimizes another page included in the set of initial test pages. 8. The method recited in claim 7 , wherein the processor includes a semiconductor device, including one or more of the following: an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). 9. The method recited in claim 7 , wherein the read count is associated with a plurality of blocks in solid state storage. 10. The method recited in claim 9 , wherein the plurality of blocks is able to be accessed simultaneously. 11. The method recited in claim 7 , wherein evaluating includes: performing error correction decoding on test read data from the performed test read; determining a number of bit errors by comparing corrected data from the performed error correction decoding against the test read data; determining if the number of bit errors is greater than a bit error threshold; and when it is determined that the number of bit errors is greater than the bit error threshold, declaring that read disturb noise has been detected. 12. The method recited in claim 7 , further comprising: when read disturb noise is detected in the selected page, performing garbage collection on a group that includes the selected initial test page. 13. A computer program product, the computer program product being embodied in a non-transitory computer readable storage medium and comprising computer instructions for: determining that a read count of a block has reached one of a set of read count thresholds for the block, each read count threshold of the set of thresholds corresponding to an initial test page in a set of initial test pages; selecting, from the set of initial test pages, the initial test page which corresponds to the reached read count threshold; performing a test read on the selected initial test page; and evaluating results of the performed test read on the selected test page for read disturb noise; wherein the initial test pages in the set of initial test pages are configured to be tested first in test reads that evaluate read disturb noise; and wherein each page in the set of initial test pages victimizes a page not included in the set of initial test pages and victimizes another page included in the set of initial test pages. 14. The computer program product recited in claim 13 , wherein the read count is associated with a plurality of blocks in solid state storage. 15. The computer program product recited in claim 14 , wherein the plurality of blocks is able to be accessed simultaneously. 16. The computer program product recited in claim 13 , wherein the computer instructions for evaluating include computer instructions for: performing error correction decoding on test read data from the performed test read; determining a number of bit errors by comparing corrected data from the performed error correction decoding against the test read data; determining if the number of bit errors is greater than a bit error threshold; and when it is determined that the number of bit errors is greater than the bit error threshold, declaring that read disturb noise has been detected. 17. The computer program product recited in claim 13 further comprising computer instructions for: when read disturb noise is detected in the selected page, performing garbage collection on a group that includes the selected initial test page. 18. The system of claim 1 , wherein the page in the set of initial test pages that victimizes the page not included in the set of initial test pages and victimizes the other page included in the set of initial test pages is directly adjacent to both victimized pages. 19. The method of claim 7 , wherein the page in the set of initial test pages that victimizes the page not included in the set of initial test pages and victimizes the other page included in the set of initial test pages is directly adjacent to both victimized pages. 20. The computer program product of claim 13 , wherein the page in the set of initial test pages that victimizes the page not included in the set of initial test pages and victimizes the other page included in the set of initial test pages is directly adjacent to both victimized pages.

Assignees

Inventors

Classifications

  • Data generation devices, e.g. data inverters · CPC title

  • Protection of memory contents; Detection of errors in memory contents · CPC title

  • Sensing or reading circuits; Data output circuits · CPC title

  • G11C29/42Primary

    using error correcting codes [ECC] or parity check · CPC title

  • Sensing or reading circuits; Data output circuits · CPC title

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What does patent US9570198B2 cover?
It is determined that a read count has reached one of a set of read count thresholds. An initial test page which corresponds to the read count threshold that has been reached is selected from a set of initial test pages. There is at least one page that is not in the set of initial test pages and is victimized by an offending page that also victimizes a page in the set of initial test pages. A t…
Who is the assignee on this patent?
Sk Hynix Inc
What technology area does this patent fall under?
Primary CPC classification G11C29/42. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).