Magnetic state element and circuits

Patent metadata

Field	Value
Publication number	US-9570139-B2
Application number	US-201514696965-A
Country	US
Kind code	B2
Filing date	Apr 27, 2015
Priority date	Mar 29, 2012
Publication date	Feb 14, 2017
Grant date	Feb 14, 2017

Abstract

Described is an apparatus, for spin state element device, which comprises: a variable resistive magnetic (VRM) device to receive a magnetic control signal to adjust resistance of the VRM device; and a magnetic logic gating (MLG) device, coupled to the VRM device, to receive a magnetic logic input and perform logic operation on the magnetic logic input and to drive an output magnetic signal based on the resistance of the VRM device. Described is a magnetic de-multiplexer which comprises: a first VRM device to receive a magnetic control signal to adjust resistance of the first VRM; a second VRM device to receive the magnetic control signal to adjust resistance of the second VRM device; and an MLG device, coupled to the first and second VRM devices, the MLG device having at least two output magnets to output magnetic signals based on the resistances of the first and second VRM devices.

First claim

We claim:

1. An apparatus comprising:
a first variable resistive magnetic device;
a second variable resistive magnetic device; and
a magnetic logic gating device coupled to the first and second variable resistive magnetic devices via free magnets of the magnetic logic gating device, wherein the first and second variable resistive magnetic devices are controllable by a magnetic control signal.

2. The apparatus of claim 1 , wherein the first variable resistive magnetic device is to receive a magnetic control signal to adjust resistance of the first variable resistive magnetic device.

3. The apparatus of claim 2 , wherein the second variable resistive magnetic device is to receive the magnetic control signal to adjust resistance of the second variable resistive magnetic device.

4. The apparatus of claim 3 , wherein the magnetic logic gating device includes at least two output magnets to output magnetic signals based on the resistances of the first and second variable resistive magnetic devices.

5. The apparatus of claim 4 , wherein the magnetic control signal is a magnetic state for coupling to free magnet layers of the first and second variable resistive magnetic devices.

6. The apparatus of claim 4 , wherein the at least two output magnets include a first output magnet to drive the input magnetic signal when resistance of the first variable resistive magnetic device is different from resistance of the second variable resistance magnetic device.

7. The apparatus of claim 4 , wherein the at least two output magnets include a second output magnet to retain previous magnetic value on the second output magnet.

8. The apparatus of claim 1 , wherein the first variable resistive magnetic device comprises a pinned magnet which is complementary to a pinned magnet of the second variable resistive magnetic device.

9. The apparatus of claim 1 , wherein resistance of the first variable resistive magnetic device is different from resistance of the second variable resistive magnetic device.

10. The apparatus of claim 1 , wherein the magnetic logic gating device comprises an input magnet to receive an input magnetic signal.

11. The apparatus of claim 1 , wherein the first and second variable resistive magnetic devices are based on at least one of:
a magnetic tunnel junction (MTJ); or
a spin valve.

12. The apparatus of claim 1 , wherein the first and second variable resistive magnetic devices comprise:
a first terminal coupled to a power supply;
a second terminal coupled to the magnetic logic gating device; and
a third terminal to receive the magnetic control signal.

13. The apparatus of claim 12 , wherein the first terminal is operable to receive at least one of:
a positive power supply;
a negative power supply;
a direct-current (DC) power supply;
a clocked power supply; or
an unpowered supply.

14. The apparatus of claim 12 , wherein the second terminal is operable to provide the power supply or a version of the power supply to the magnetic logic gating device.

15. The apparatus of claim 1 , wherein the first and second variable resistive magnetic devices comprise:
a first layer having a pinned magnet to provide a reference; and
a plurality of magnetic layers, one of which is coupled to the first layer, wherein at least one of the plurality of magnetic layers is susceptible to electron spin current.

16. The apparatus of claim 15 , wherein the plurality of magnetic layers of the first and second variable resistive devices comprise a free magnet layer, and wherein the magnetic control signal is a magnetic state coupled to the free magnet layer.

17. The apparatus of claim 15 , wherein the plurality of magnetic layers of the first and second variable resistive devices comprise a spin-scramble-layer (SSL) to make electron current, from the first and second variable resistive devices, non-spin polarized.

18. The apparatus of claim 17 , wherein the SSL is used to convert a spin-dependent electro-chemical potential to a scalar voltage at one terminal of the first and second variable resistive magnetic devices.

19. The apparatus of claim 17 , wherein the SSL has a short-spin flip length to de-phase electron spin in the first and second variable resistive magnetic devices.

20. The apparatus of claim 1 , wherein a reference of the first variable resistive magnetic device is different from a reference of the second variable resistive magnetic device.

21. The apparatus of claim 1 , wherein the magnetic control signal is one of:
an electric field; or
a spin current.

22. A system comprising:
a memory;
a processor coupled to the memory, the processor including a magnetic de-multiplexer which comprises:
a first variable resistive magnetic device;
a second variable resistive magnetic device; and
a magnetic logic gating device coupled to the first and second variable resistive magnetic devices via free magnets of the magnetic logic gating device, wherein the first and second variable resistive magnetic devices are controllable by a magnetic control signal; and

a wireless interface for allowing the processor to communicate with another device.

23. The system of claim 22 , wherein the processor further includes a magnetic state element which comprises at least one of:
a magnetic D-flip-flip; or
a set of magnetic flip-flips.

24. The system of claim 22 , wherein the processor further comprises magnetic combinatorial logic including a magnetic logic gating device.

Assignees

• Intel Corp

Inventors

• Manipatruni Sasikanth
• Nikonov Dmitri E
• Young Ian A

Classifications

• H03K19/16 Primary

  using saturable magnetic devices · CPC title

• G11C11/1675

  Writing or programming circuits or methods · CPC title

• G11C11/161 Primary

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• G11C11/16

  using elements in which the storage effect is based on magnetic spin effect · CPC title

• G11C11/1697 Primary

  Power supply circuits · CPC title