Display processing device and imaging apparatus

Patent metadata

Field	Value
Publication number	US-9569160-B2
Application number	US-201514683459-A
Country	US
Kind code	B2
Filing date	Apr 10, 2015
Priority date	May 14, 2014
Publication date	Feb 14, 2017
Grant date	Feb 14, 2017

Abstract

A display processing device includes: a first display processing unit that outputs image data of a first output image obtained by performing display processing on display image data of an odd column of a display image; a second display processing unit that outputs image data of a second output image obtained by performing the display processing on display image data of an even column of the display image; an output selection unit that selects the image data of the first output image or the image data of the second output image and outputs the selected image data to a first display device that displays a display image; and a clock control unit that supplies an operation clock required when the respective elements operate.

First claim

What is claimed is:

1. A display processing device that performs predetermined display processing on image data of a display image of a predetermined first size, the image data of the display image of the first size being input to the display processing device, the display processing device comprising:
a first display processing unit that outputs image data of a first output image obtained by performing the display processing on display image data of an odd column of a display image of a second size larger than the first size, when the display image of the second size is input to the first display processing unit;
a second display processing unit that outputs image data of a second output image obtained by performing the display processing on display image data of an even column of the display image of the second size;
an output selection unit that selects the image data of the first output image or the image data of the second output image, and outputs the selected image data to a first display device that displays the display image of the second size; and
a clock control unit that generates and supplies an operation clock required when the first display processing unit and the second display processing unit operate, wherein
the first display processing unit includes:
a first synchronization signal generation block that generates and outputs a synchronization signal required when the first display device displays an image corresponding to output image data output from the output selection unit, and generates and outputs a first trigger signal representing a first timing at which acquisition of the display image data of the odd column is started and a second trigger signal representing a second timing at which acquisition of the display image data of the even column is started, on the basis of the operation clock supplied from the clock control unit;
a first input control block that acquires the display image data of the odd column in response to the first trigger signal; and
a first display processing block that outputs the image data of the first output image obtained by performing the display processing on the display image data of the odd column acquired by the first input control block, and

the second display processing unit includes:
a second synchronization signal generation block that generates a synchronization signal required when a second display device, which is handled by the second display processing unit independently, displays an image corresponding to output image data output from the second display processing unit, and generates and outputs a third trigger signal representing a third timing at which acquisition of the image data of the display image of the first size, which is handled by the second display processing unit independently, is started, on the basis of the operation clock supplied from the clock control unit;
a synchronization signal selection block that selects any one of the second trigger signal and the third trigger signal and outputs the selected trigger signal as a fourth trigger signal;
a second input control block that acquires the display image data of the even column or the image data of the display image of the first size, which is handled by the second display processing unit independently, in response to the fourth trigger signal; and
a second display processing block that outputs the display image data of the even column acquired by the second input control block or the image data of the second output image obtained by performing the display processing on the image data of the display image of the first size, which is handled by the second display processing unit independently.

2. The display processing device according to claim 1 , wherein the first display processing unit acquires the display image data of the odd column by a direct memory access (DMA) and notifies the second display processing unit of a timing at which the display image data of the even column is acquired by the DMA.

3. The display processing device according to claim 2 , wherein the clock control unit generates a display device clock of a frequency required when the first display device displays an image corresponding to one pixel, and generates the operation clock with the same phase as the generated display device clock.

4. The display processing device according to claim 3 , wherein, on the basis of the synchronization signal output by the first display processing unit and corresponding to the first display device, the output selection unit determines a period in which the first display device displays an image, alternately selects the image data of the first output image and the image data of the second output image at each timing of the display device clock for the determined period in which the first display device displays the image, and outputs the selected image data to the first display device at a timing of the display device clock.

5. The display processing device according to claim 3 , wherein, on the basis of the synchronization signal output by the first display processing unit and corresponding to the first display device, the output selection unit determines a period in which the first display device displays an image, simultaneously selects the image data of the first output image and the image data of the second output image at a timing of the operation clock for the determined period in which the first display device displays the image, and outputs the selected image data to respective corresponding input systems provided in the first display device at the timing of the operation clock.

6. An imaging apparatus including the display processing device according to claim 1 .

7. A display processing device that performs predetermined display processing on image data of a display image of a predetermined first size, the image data of the display image of the first size being input to the display processing device, the display processing device comprising:
a first display processing unit that outputs image data of a first output image obtained by performing the display processing on display image data of an odd column of a display image of a second size larger than the first size, when the display image of the second size is input to the first display processing unit;
a second display processing unit that outputs image data of a second output image obtained by performing the display processing on display image data of an even column of the display image of the second size;
an output selection unit that selects the image data of the first output image or the image data of the second output image, and outputs the selected image data to a first display device that displays the display image of the second size; and
a clock control unit that generates and supplies an operation clock required when the first display processing unit and the second display processing unit operate, wherein
the first display processing unit includes:
a first synchronization signal generation block that generates and outputs a synchronization signal required when the first display device displays an image corresponding to output image data output from the output selection unit, and generates and outputs a first trigger signal representing a first timing at which acquisition of the display image data of the odd column by a direct memory access (DMA) is started and a second trigger signal representing a second timing at which acquisition of the display image data of the even column by the DMA is started, on the basis of the operation clock supplied from the clock control unit;
a first input control block that acquires the display image data of the odd column by the DMA in response to the first trigger signal; and
a first display processing block that outputs the image data

Assignees

• Olympus Corp

Inventors

• Tsuchida Ryusuke
• Ueno Akira

Classifications

• H04N23/63

  by using electronic viewfinders · CPC title

• H04N5/04 Primary

  Synchronising (for television systems using pulse code modulation H04N7/56) · CPC title

• G09G5/393

  Arrangements for updating the contents of the bit-mapped memory · CPC title

• G06F3/14 Primary

  Digital output to display device {; Cooperation and interconnection of the display device with other functional units} · CPC title

• G06F3/1431

  using a single graphics controller · CPC title