Triple activate command row address latching
US-2024069759-A1 · Feb 29, 2024 · US
US9569133B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9569133-B2 |
| Application number | US-201615168370-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 31, 2016 |
| Priority date | Nov 14, 2011 |
| Publication date | Feb 14, 2017 |
| Grant date | Feb 14, 2017 |
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A method may comprise receiving a page of data to be stored on a storage resource. The method may also comprise determining, for each particular inversion mode of a plurality of inversion modes, the number of bits of the page of data to be inverted to store a representation of the page of data in accordance with the particular inversion mode. The method may additionally comprise determining a selected inversion mode from the plurality of inversion modes for the page of data, the selected inversion mode comprising the inversion mode for which the least number of physical bit transitions are required to store the representation of the page of data in accordance with the selected inversion mode. The method may further comprise storing the representation of the page of data in a data memory in accordance with the inversion mode.
Opening claim text (preview).
What is claimed is: 1. A method comprising: reading a representation of a data page from a data memory; identifying a plurality of inversion modes, each particular inversion mode among the plurality of inversion modes defining an identity of bits within the data page that are inverted to generate a representation of the data page, at least one particular inversion mode defining a bit within the data page to be inverted and a bit within the data page not to be inverted; reading an inversion mode field from a location within the representation of the data page; selecting an inversion mode from the plurality of inversion modes based on the inversion mode field, the selected inversion mode applied to the data page to generate the representation of the data page; and inverting bits of the representation of the data page in accordance with the selected inversion mode to retrieve the data page. 2. The method of claim 1 , wherein the selected inversion mode applied to the data page requires the least number of bits of the data page to be inverted. 3. The method of claim 1 , wherein reading the inversion mode field includes: performing a modulo function based on a logical address of the data page; and determining a location within the representation of the data page based on the modulo function. 4. The method of claim 1 , wherein the plurality of inversion modes comprise at least two of: an even-bits inversion mode, an odd-bits inversion mode, an even-bit-pairs inversion mode, an odd-bit-pairs inversion mode; and even-nibbles inversion mode; an odd-nibbles inversion mode; a first-bit-pair inversion mode; a second-bit-pair inversion mode; a third-bit-pair inversion mode; and a fourth-bit-pair inversion mode. 5. The method of claim 1 , wherein the data memory is a flash memory. 6. The method of claim 1 , wherein the data memory is a NAND-based flash memory. 7. A storage resource comprising: a data memory configured to store data; and logic communicatively coupled to the data memory and configured to: read a representation of a data page from the data memory; identify a plurality of inversion modes, each particular inversion mode among the plurality of inversion modes defining an identity of bits within the data page that are inverted to generate a representation of the data page, at least one particular inversion mode defining a bit within the data page to be inverted and a bit within the data page not to be inverted; reading an inversion mode field from a location within the representation of the data page; select an inversion mode from the plurality of inversion modes based on the inversion mode field, the selected inversion mode applied to the data page to generate the representation of the data page; and invert bits of the representation of the data page in accordance with the selected inversion mode to retrieve the data page. 8. The storage resource of claim 7 , wherein the selected inversion mode applied to the data page requires the least number of bits of the data page to be inverted. 9. The storage resource of claim 7 , wherein reading the inversion mode field includes: performing a modulo function based on a logical address of the data page; and determining a location within the representation of the data page based on the modulo function. 10. The storage resource of claim 7 , wherein the plurality of inversion modes comprise at least two of: an even-bits inversion mode, an odd-bits inversion mode, an even-bit-pairs inversion mode, an odd-bit-pairs inversion mode; and even-nibbles inversion mode; an odd-nibbles inversion mode; a first-bit-pair inversion mode; a second-bit-pair inversion mode; a third-bit-pair inversion mode; and a fourth-bit-pair inversion mode. 11. The storage resource of claim 7 , wherein the data memory is a flash memory. 12. The storage resource of claim 7 , wherein the data memory is a NAND-based flash memory. 13. An information handling system comprising: a processor; and a storage resource communicatively coupled to the processor and configured to: read a representation of a data page from a data memory of the storage resource; identify a plurality of inversion modes, each particular inversion mode among the plurality of inversion modes defining an identity of bits within the data page that are inverted to generate a representation of the data page, at least one particular inversion mode defining a bit within the data page to be inverted and a bit within the data page not to be inverted; read an inversion mode field from a location within the representation of the data page; select an inversion mode from the plurality of inversion modes based on the inversion mode field, the selected inversion mode applied to the data page to generate the representation of the data page; and invert bits of the representation of the data page in accordance with the selected inversion mode to retrieve the data page. 14. The information handling system of claim 13 , wherein the selected inversion mode applied to the data page requires the least number of bits of the data page to be inverted. 15. The information handling system of claim 13 , wherein reading the inversion mode field includes: performing a modulo function based on a logical address of the data page; and determining a location within the representation of the data page based on the modulo function. 16. The information handling system of claim 13 , wherein the plurality of inversion modes comprise at least two of: an even-bits inversion mode, an odd-bits inversion mode, an even-bit-pairs inversion mode, an odd-bit-pairs inversion mode; and even-nibbles inversion mode; an odd-nibbles inversion mode; a first-bit-pair inversion mode; a second-bit-pair inversion mode; a third-bit-pair inversion mode; and a fourth-bit-pair inversion mode. 17. The information handling system of claim 13 , wherein the data memory is a flash memory.
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