Bandgap reference circuit with beta-compensation

Patent metadata

Field	Value
Publication number	US-9568929-B2
Application number	US-201414444890-A
Country	US
Kind code	B2
Filing date	Jul 28, 2014
Priority date	Jul 28, 2014
Publication date	Feb 14, 2017
Grant date	Feb 14, 2017

Abstract

Described are apparatuses and methods for generating a temperature-stabilized reference voltage on a semiconductor chip. An apparatus may include a differential amplifier including a first input, a second input, and an output. The apparatus may further include a first bipolar junction transistor (BJT) coupled to the first input; a second BJT coupled to the second input; and beta compensation circuitry, coupled to the first BJT and the second BJT, to regulate a first collector current of the first BJT to be independent of a first current gain of the first BJT and a second collector current of the second BJT to be independent of a second current gain of the second BJT. Other embodiments may be described and/or claimed.

First claim

I claim:

1. A circuit, comprising:
a differential amplifier comprising a first input, a second input, and an output;
a first bipolar junction transistor (BJT) coupled to the first input;
a second BJT coupled to the second input; and
beta compensation circuitry, coupled to the first BJT and the second BJT, to regulate a first collector current of the first BJT to be independent of a first current gain of the first BJT and a second collector current of the second BJT to be independent of a second current gain of the second BJT, wherein the beta compensation circuitry comprises:
a first transistor, coupled to a first emitter and a first base of the first BJT, to form a first feedback loop between the first emitter and the first base of the first BJT, wherein the first feedback loop is to provide a first corrective current to the first emitter based at least in part on a first base current from the first base; and
a second transistor, coupled to a second emitter and a second base of the second BJT, to form a second feedback loop between the second emitter and the second base of the second BJT, wherein the second feedback loop is to provide a second corrective current to the second emitter based at least in part on a second base current from the second base.

2. The circuit of claim 1 , wherein the differential amplifier is to keep a first potential at the first emitter of the first BJT at a same level as a second potential at the second emitter of the second BJT.

3. The circuit of claim 1 , wherein the first and second BJTs have different current densities.

4. The circuit of claim 1 , wherein the beta compensation circuitry comprises a first resistor, coupled to the first base of the first BJT, to control a clamping function at the first base of the first BJT.

5. The circuit of claim 4 , wherein the beta compensation circuitry is to make a first voltage difference between a base voltage and an emitter voltage of the first BJT, and a second voltage difference between a base voltage and an emitter voltage of the second BJT, equal to a voltage drop over the first resister.

6. The circuit of claim 4 , wherein the beta compensation circuitry comprises a second resistor, coupled to the first resistor, to scale a bandgap reference voltage of the circuit established at the first emitter of the first BJT or the second emitter of the second BJT.

7. The circuit of claim 1 , wherein the beta compensation circuitry is to establish a bandgap reference voltage with a zero temperature coefficient based on a voltage at the first emitter of the first BJT or the second emitter of the second BJT.

8. A circuit, comprising:
a bipolar junction transistor (BJT) having an emitter coupled to a first fixed current source to supply a first current to the BJT, a base coupled to a second fixed current source to supply a second current to the BJT, and a collector to output a collector current, wherein the BJT has a current gain based on the collector current and a base current from the base; and
a feedback loop, coupled to the emitter and the base, to regulate the collector current independent of the current gain.

9. The circuit of claim 8 , wherein the feedback loop comprises a first node and a second node on a path from the first fixed current source to the second fixed current source, wherein the first node splits the first current onto a first path and a second path, and wherein the first path and the second path merge into the second node.

10. The circuit of claim 9 , wherein the feedback loop is to regulate a sum of currents merged at the second node from the first path and the second path to be equal to the second current.

11. The circuit of claim 9 , wherein the feedback loop comprises a separating device located on the second path from the first node to the second node.

12. The circuit of claim 11 , wherein the separating device is an N-type metal-oxide-semiconductor field-effect transistor.

13. The circuit of claim 8 , wherein the feedback loop is to regulate the collector current to be equal to a difference between the first current and the second current.

14. The circuit of claim 8 , wherein the feedback loop is to regulate the collector current to be independent of a variance of the base current from the base.

15. A method, comprising:
sensing a base current from a base of a bipolar junction transistor (BJT);
applying a corrective current to an emitter of the BJT, based at least in part on the sensed base current;
supplying first and second fixed currents to a feedback loop between the emitter and the base;
providing a collector current from a collector of the BJT independent of a current gain of the BJT, the collector current equal to a difference between the first and second fixed currents.

16. The method of claim 15 , further comprising:
splitting the first fixed current onto a first path and a second path of the feedback loop, wherein the first path includes the emitter and the second path includes the base;
adjusting a current on the second path based on the sensed base current and the second fixed current; and
applying the corrective current to the emitter based on the current on the second path and the first fixed current.

Assignees

• Intel Corp

Inventors

• Eberlein Matthias

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title