Display device and semiconductor device

Patent metadata

Field	Value
Publication number	US-9564539-B2
Application number	US-201614989886-A
Country	US
Kind code	B2
Filing date	Jan 7, 2016
Priority date	Jul 21, 2006
Publication date	Feb 7, 2017
Grant date	Feb 7, 2017

Abstract

An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

First claim

What is claimed is:

1. A display device comprising:
a first transistor;
a second transistor electrically connected to the first transistor;
a first wiring electrically connected to one of a source and a drain of the first transistor;
a second wiring electrically connected to one of a source and a drain of the second transistor; and
an electroluminescent element electrically connected to the other of the source and the drain of the first transistor,
wherein a semiconductor layer including a channel formation region of the first transistor includes a curved portion,
wherein the first wiring and the channel formation region of the first transistor overlap each other,
wherein the second wiring and the semiconductor layer of the first transistor overlap each other,
wherein the channel formation region of the first transistor includes a region capable of flowing a carrier in a direction,
wherein a longitudinal direction of the first wiring intersects with the direction, and
wherein a longitudinal direction of the second wiring intersects with the direction.

2. The display device according to claim 1 , further comprising:
a third wiring electrically connected to a gate of the second transistor,
wherein a longitudinal direction of the third wiring is parallel to the direction.

3. The display device according to claim 1 , wherein a pixel electrode of the electroluminescent element includes a rounded corner.

4. The display device according to claim 1 , wherein a gate electrode of the first transistor is capable of being one electrode of a capacitor.

5. The display device according to claim 4 , wherein the capacitor and the semiconductor layer of the first transistor overlap each other.

6. The display device according to claim 4 , wherein the first wiring is capable of being the other electrode of the capacitor.

7. The display device according to the claim 1 , wherein the first transistor has a multi-gate structure.

8. The display device according to claim 1 , wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor.

9. An electronic device comprising the display device according to claim 1 .

10. The display device according to claim 1 ,
wherein the first wiring is configured to supply a current to the electroluminescent element via the first transistor, and
wherein the second wiring is configured to transmit a signal that is transmitted to the first transistor via the second transistor.

11. The display device according to claim 1 ,
wherein the first wiring is located between adjacent pixel electrodes,
wherein a channel width direction of the channel formation region of the first transistor is parallel to a longitudinal direction of one of the adjacent pixel electrodes, and
wherein a channel width of the channel formation region of the first transistor is longer than a channel length of the channel formation region of the first transistor.

12. A display device comprising:
a first transistor;
a second transistor electrically connected to the first transistor;
a first wiring electrically connected to one of a source and a drain of the first transistor;
a second wiring electrically connected to one of a source and a drain of the second transistor; and
an electroluminescent element electrically connected to the other of the source and the drain of the first transistor,
wherein a semiconductor layer including a channel formation region of the first transistor includes a U-shaped curved portion,
wherein the first wiring and the channel formation region of the first transistor overlap each other,
wherein the second wiring and the semiconductor layer of the first transistor overlap each other,
wherein the channel formation region of the first transistor includes a region capable of flowing a carrier in a direction,
wherein a longitudinal direction of the first wiring intersects with the direction,
wherein a longitudinal direction of the second wiring intersects with the direction,
wherein the channel formation region of the first transistor includes crystalline silicon, and
wherein a channel formation region of the second transistor includes crystalline silicon.

13. The display device according to claim 12 , further comprising:
a third wiring electrically connected to a gate of the second transistor,
wherein a longitudinal direction of the third wiring is parallel to the direction.

14. The display device according to claim 12 , wherein a pixel electrode of the electroluminescent element includes a rounded corner.

15. The display device according to claim 12 , wherein a gate electrode of the first transistor is capable of being one electrode of a capacitor.

16. The display device according to claim 15 , wherein the capacitor and the semiconductor layer of the first transistor overlap each other.

17. The display device according to claim 15 , wherein the first wiring is capable of being the other electrode of the capacitor.

18. The display device according to the claim 12 , wherein the first transistor has a multi-gate structure.

19. The display device according to claim 12 , wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor.

20. An electronic device comprising the display device according to claim 12 .

21. The display device according to claim 12 ,
wherein the first wiring is configured to supply a current to the electroluminescent element via the first transistor, and
wherein the second wiring is configured to transmit a signal that is transmitted to the first transistor via the second transistor.

22. The display device according to claim 12 ,
wherein the first wiring is located between adjacent pixel electrodes,
wherein a channel width direction of the channel formation region of the first transistor is parallel to a longitudinal direction of one of the adjacent pixel electrodes, and
wherein a channel width of the channel formation region of the first transistor is longer than a channel length of the channel formation region of the first transistor.

Assignees

• Semiconductor Energy Lab

Inventors

• Sato Mizuki

Classifications

• G02F1/1362

  Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10D86/441 Primary

  Interconnections, e.g. scanning lines · CPC title

• H01L29/78696 Primary

  Electricity · mapped topic