Composite grid structure to reduce crosstalk in back side illumination image sensors

Patent metadata

Field	Value
Publication number	US-9564468-B2
Application number	US-201514663899-A
Country	US
Kind code	B2
Filing date	Mar 20, 2015
Priority date	Mar 20, 2015
Publication date	Feb 7, 2017
Grant date	Feb 7, 2017

Abstract

A semiconductor structure for back side illumination (BSI) pixel sensors is provided. Photodiodes are arranged within a semiconductor substrate. A metal grid overlies the semiconductor substrate and is made up of metal grid segments that surround outer perimeters of the photodiodes, respectively, such that first openings within the metal grid overlie the photodiodes, respectively. A low-n grid is made up of low-n grid segments that surround the respective outer perimeters of the photodiodes, respectively, such that second openings within the low-n grid overlie the photodiodes, respectively. Color filters are arranged in the first and second openings of the photodiodes and have a refractive index greater than a refractive index of the low-n grid. A substrate isolation grid extends into the semiconductor substrate and is made up of isolation grid segments that surround outer perimeters of the photodiodes, respectively. A method for manufacturing the BSI pixel sensors is also provided.

First claim

What is claimed is:

1. A semiconductor structure for back side illumination (BSI) pixel sensors, the semiconductor structure comprising:
a plurality of photodiodes arranged within a semiconductor substrate;
a metal grid overlying the semiconductor substrate and made up of a plurality of metal grid segments that surround outer perimeters of the plurality of photodiodes, respectively, such that a plurality of first openings within the metal grid overlie the plurality of photodiodes, respectively;
a low refractive index (low-n) grid made up of a plurality of low-n grid segments that surround the outer perimeters of the plurality of photodiodes, respectively, such that a plurality of second openings within the low-n grid overlie the plurality of photodiodes, respectively;
color filters arranged in the first and second openings and having a refractive index greater than a refractive index of the low-n grid; and
a substrate isolation grid extending into the semiconductor substrate and made up of a plurality of isolation grid segments that surround the outer perimeters of the plurality of photodiodes, respectively, wherein the substrate isolation grid is a metal or a low-n material having a refractive index less than a refractive index of the color filters.

2. The semiconductor structure according to claim 1 , wherein the substrate isolation grid is continuous with the metal grid such that the metal grid extends into the semiconductor substrate between and around the photodiodes.

3. The semiconductor structure according to claim 1 , wherein the substrate isolation grid is distinct from the metal grid and has an upper surface that is about even with an upper surface of the semiconductor substrate.

4. The semiconductor structure according to claim 1 , further including:
an anti-reflective coating overlying the semiconductor substrate; and
a dielectric layer overlying the anti-reflective coating;
wherein the metal grid has an upper surface that is about even with an upper surface of the dielectric layer.

5. The semiconductor structure according to claim 1 , wherein the first openings and the second openings are laterally offset from the photodiodes, so that the metal grid and the low-n grid partially cover the photodiodes.

6. The semiconductor structure according to claim 1 , wherein the first openings, the second openings, and the photodiodes share a footprint, and wherein the first and second openings are centered on centers of the corresponding photodiodes.

7. The semiconductor structure according to claim 1 , wherein the metal grid and the low-n grid have edges that are aligned to one another.

8. The semiconductor structure according to claim 1 , wherein the low-n grid is laterally offset from the metal grid so sidewalls of the metal and low-n grids abut.

9. The semiconductor structure according to claim 1 , further including:
an integrated circuit disposed on the semiconductor substrate and a back-end-of-line (BEOL) metallization stack underlying the semiconductor substrate.

10. The semiconductor structure according to claim 1 , further including:
micro lenses arranged over the color filters.

11. The semiconductor structure according to claim 1 , wherein the substrate isolation grid is arranged over the semiconductor substrate and under the low-n grid, and wherein the low-n grid adjoins the metal grid.

12. A semiconductor structure for a back side illumination (BSI) image sensor package, the semiconductor structure comprising:
an integrated circuit comprising a semiconductor substrate and a back-end-of-line (BEOL) metallization stack, wherein photodiodes are arranged in the semiconductor substrate and the BEOL metallization stack underlies the semiconductor substrate;
a low refractive index (low-n) grid and a hard mask grid collectively defining openings overlying the semiconductor substrate and corresponding to the photodiodes, wherein the hard mask grid masks the low-n grid;
color filters arranged in the openings and having a refractive index greater than a refractive index of the low-n grid; and
a substrate isolation grid underlying the low-n grid and extending into the semiconductor substrate between and around the photodiodes, wherein the substrate isolation grid is conductive and has a top surface spaced over a top surface of the semiconductor substrate.

13. The semiconductor structure according to claim 12 , wherein a bottom surface of the low-n grid is arranged over a top surface of the substrate isolation grid, and wherein the openings are symmetrical about vertical axes arranged respectively at width-wise centers of the openings.

14. The semiconductor structure according to claim 12 , wherein the substrate isolation grid is arranged laterally adjacent to the low-n grid, and wherein the openings individually have a stepped profile and are asymmetric about vertical axes arranged respectively at width-wise centers of the openings.

15. The semiconductor structure according to claim 12 , wherein the low-n grid, the hard mask grid, and the substrate isolation grid each comprise a plurality of grid segments, wherein the grid segments of the hard mask grid and the low-n grid laterally enclose respective interior regions intersecting with corresponding ones of the openings, and wherein the grid segments of the substrate isolation grid laterally enclose corresponding ones of the photodiodes.

16. The semiconductor structure according to claim 12 , wherein a bottom surface of the low-n grid is arranged over and contacts the top surface of the substrate isolation grid.

17. The semiconductor structure according to claim 12 , wherein a bottom surface of the low-n grid is arranged over the top surface of the substrate isolation grid, and wherein width-wise centers of the openings are laterally offset from width-wise centers of respective ones of the photodiodes.

18. An image sensor comprising:
a plurality of photodiodes arranged within a semiconductor substrate;
a metal grid overlying the semiconductor substrate and comprising a plurality of metal grid segments that laterally enclose a plurality of first openings, respectively, wherein the first openings overly the photodiodes, respectively;
a dielectric grid overlying the semiconductor substrate and adjoining the metal grid, wherein the dielectric grid comprises a plurality of dielectric grid segments that laterally enclose a plurality of second openings, respectively, and wherein the second openings overly the photodiodes, respectively; and
an isolation grid arranged over the semiconductor substrate and arranged under the dielectric grid, wherein the isolation grid extends into the semiconductor substrate and comprises a plurality of isolation grid segments that laterally enclose the photodiodes, respectively.

19. The image sensor according to claim 18 , wherein the metal grid is spaced over the isolation grid.

20. The image sensor according to claim 18 , wherein the isolation grid and the metal grid are integrated together.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chou Keng-Yu
• Chuang Chun-Hao
• Tseng Chien-Hsien
• Ting Shyh-Fann
• Chiang Wei-Chieh
• Yamashita Yuichiro

Classifications

• H01L27/14621

  Electricity · mapped topic

• H01L27/14685

  Electricity · mapped topic

• H01L27/1463

  Electricity · mapped topic

• H01L27/14627

  Electricity · mapped topic

• H01L27/14645 Primary

  Electricity · mapped topic