Substrate opening formation in semiconductor devices

Patent metadata

Field	Value
Publication number	US-9564405-B2
Application number	US-201615154864-A
Country	US
Kind code	B2
Filing date	May 13, 2016
Priority date	May 15, 2015
Publication date	Feb 7, 2017
Grant date	Feb 7, 2017

Abstract

Radio-frequency (RF) devices are fabricated by providing a field-effect transistor (FET) formed over an oxide layer, forming one or more electrical connections to the FET, forming one or more dielectric layers over at least a portion of the electrical connections, electrically coupling an electrical element to the FET via the one or more electrical connections, disposing a handle wafer layer on at least a portion of the one or more dielectric layers, the handle wafer layer being at least partially over the electrical element; and removing at least a portion of the handle wafer layer to form an opening exposing at least a portion of the electrical element.

First claim

What is claimed is:

1. A method of fabricating a radio-frequency device comprising:
providing a field-effect transistor formed over an oxide layer;
forming one or more electrical connections to the field-effect transistor;
forming one or more dielectric layers over at least a portion of the electrical connections;
electrically coupling an electrical element to the field-effect transistor via the one or more electrical connections;
disposing a handle wafer layer on at least a portion of the one or more dielectric layers, the handle wafer layer being at least partially over the electrical element; and
removing at least a portion of the handle wafer layer to form an opening exposing at least a portion of the electrical element.

2. The method of claim 1 further comprising thinning the handle wafer layer prior to said removing the at least a portion of the handle wafer layer.

3. The method of claim 1 further comprising covering at least a portion of the handle wafer layer and the opening with a covering to form a cavity.

4. The method of claim 3 wherein the covering is a laminate film.

5. The method of claim 3 wherein the covering is an additional replacement substrate layer.

6. The method of claim 1 further comprising at least partially filling the opening with a dielectric material.

7. The method of claim 6 further comprising covering at least a portion of the handle wafer layer with the dielectric material to form a dielectric layer.

8. The method of claim 7 further comprising applying a replacement substrate layer to the dielectric layer to provide mechanical stability for the radio-frequency device.

9. The method of claim 1 wherein the electrical element is a surface acoustic wave device.

10. The method of claim 1 wherein the electrical element is a bulk acoustic wave device.

11. The method of claim 1 further comprising at least partially removing the substrate layer to expose at least a portion of a backside of an oxide layer disposed between the field-effect transistor and the substrate layer.

12. The method of claim 11 further comprising disposing an electrical contact structure on the backside of the oxide layer to provide electrical contact to the one or more electrical connections through a through-oxide via.

13. The method of claim 11 further comprising disposing a substrate contact layer on the backside of the oxide layer.

14. A radio-frequency device comprising:
a field-effect transistor implemented over an oxide layer;
one or more electrical connections to the field-effect transistor;
one or more dielectric layers formed over at least a portion of the electrical connections;
an electrical element electrically coupled to the field-effect transistor via the one or more electrical connections; and
a handle wafer layer disposed on at least a portion of the one or more dielectric layers, the handle wafer layer including a topside trench defined at least in part by sidewall portions of the handle wafer layer, the trench exposing at least a portion of the electrical element.

15. The radio-frequency device of claim 14 further comprising a covering that covers at least a portion of the handle wafer layer and the trench to form a cavity.

16. The radio-frequency device of claim 14 further comprising a dielectric material that at least partially fills the trench.

17. The radio-frequency device of claim 16 further comprising a replacement substrate layer applied to the dielectric material to provide mechanical stability for the radio-frequency device.

18. A wireless device comprising:
a transceiver configured to process radio-frequency signals;
a radio-frequency module in communication with the transceiver, the radio-frequency module including a switching device having a field-effect transistor (FET) implemented over an oxide layer, one or more electrical connections to the field-effect transistor, one or more dielectric layers formed over at least a portion of the electrical connections, an electrical element electrically coupled to the field-effect transistor via the one or more electrical connections, a handle wafer layer disposed on at least a portion of the one or more dielectric layers, the handle wafer layer including a topside trench defined at least in part by sidewall portions of the handle wafer layer, the trench exposing at least a portion of the electrical element; and
an antenna in communication with the radio-frequency module, the antenna configured to facilitate transmitting and/or receiving of the radio-frequency signals.

19. The wireless device of claim 18 wherein the radio-frequency module further includes a covering that covers at least a portion of the handle wafer layer and the trench to form a cavity.

20. The wireless device of claim 18 wherein the radio-frequency module further comprises a dielectric material that at least partially fills the trench.

Assignees

• Skyworks Solutions Inc

Inventors

• Mason Jerod F
• Bartle Dylan Charles
• Whitefield David Scott

Classifications

• H10W70/63

  Vias, e.g. via plugs · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/9445

  Top-view layouts, e.g. mirror arrays · CPC title