Smart self repair device and method

Patent metadata

Field	Value
Publication number	US-9564247-B2
Application number	US-201514874611-A
Country	US
Kind code	B2
Filing date	Oct 5, 2015
Priority date	May 26, 2015
Publication date	Feb 7, 2017
Grant date	Feb 7, 2017

Abstract

A smart self-repair device includes an ARE array configured to store information on respective bits of a fail address in fuses; a self-repair control block configured to store a row address and a column address corresponding to a fail bit when a fail occurs, analyze a fail mode by comparing the fail address inputted in a test and the stored addresses, and output fail address information and row fuse set information or column fuse set information according to the fail mode; a data control block configured to output repair information to the ARE array according to the fail address information and the row fuse set information or the column fuse set information; and a rupture control block configured to control a rupture operation of the ARE array.

First claim

What is claimed is:

1. A smart self-repair device comprising:
an array rupture electrical fuse (ARE) array configured to store information on respective bits of a fail address in fuses;
a self-repair control block configured to store a row address and a column address corresponding to a fail bit when a fail occurs, analyze a fail mode by comparing the fail address inputted in a test and the stored addresses, and output fail address information and row fuse set information or column fuse set information according to the fail mode;
a data control block configured to output repair information to the ARE array according to the fail address information and the row fuse set information or the column fuse set information; and
a rupture control block configured to control a rupture operation of the ARE array,
wherein the self-repair control block comprises:
a repair selection unit configured to store the row address and the column address corresponding to the fail bit, and analyze the fail mode by comparing the fail address inputted in the test and the stored addresses; and
a fuse set selection unit configured to output the fail address information and the row fuse set information or the column fuse set information in correspondence to the fail mode.

2. The smart self-repair device according to claim 1 , further comprising:
an oscillation block configured to output a clock to the self-repair control block according to a boot-up enable signal and a rupture enable signal.

3. The smart self-repair device according to claim 1 , wherein the repair selection unit comprises:
row/column address registers configured to sequentially store row addresses and column addresses corresponding to a plurality of different fail bits when the fail occurs;
address comparison sections configured to compare the fail address of a fail cell which is additionally inputted in the test, with the addresses stored in the row/column address registers;
multi-bit counters configured to count outputs of the address comparison sections; and
a fail mode analysis section configured to analyze one or more fail modes of fail addresses stored in the row/column address registers in correspondence to outputs of the multi-bit counters when the test is ended, and output a fuse set selection signal.

4. The smart self-repair device according to claim 3 , wherein, where a row redundancy signal is a low level, the fail mode analysis section determines that a fail has occurred in a cell in which a row redundancy is used, and, where the row redundancy signal is a high level, the fail mode analysis section determines that a fail has occurred in a main cell.

5. The smart self-repair device according to claim 3 , wherein the fail mode analysis section receives the outputs of the multi-bit counters, a row redundancy signal, a redundancy control signal, a row redundancy selection signal, a column redundancy selection signal and row/column fuse nonuse signals, and outputs the fuse set selection signal for performing repair using a row redundancy or a column redundancy, to the data control block.

6. The smart self-repair device according to claim 3 , wherein the fail mode analysis section receives the outputs of the multi-bit counters, a row redundancy signal, a redundancy control signal, a row redundancy selection signal, a column redundancy selection signal and row/column fuse nonuse signals, and determines whether it is a single bit fail, a column-oriented fail, a row-oriented fail or a cluster-oriented fail.

7. The smart self-repair device according to claim 3 , wherein the fail mode analysis section comprises:
a selection signal generation part configured to perform a logic function on a row multi-bit signal and a column multi-bit signal applied from the multi-bit counters, a priority signal, a row redundancy signal, a row redundancy selection signal and a column redundancy selection signal, and output the fuse set selection signal; and
a control signal generation part configured to perform an other logic function on the row multi-bit signal, the column multi-bit signal, a row fuse nonuse signal, a column fuse nonuse signal and a redundancy control signal, and generate the priority signal.

8. The smart self-repair device according to claim 7 , wherein, where both the row multi-bit signal and the column multi-bit signal are high levels, the fail mode analysis section determines that both a row-oriented fail and a column-oriented fail have occurred and outputs the fuse set selection signal at a low level, and, where at least any one of the row multi-bit signal and the column multi-bit signal is the low level, the fail mode analysis section changes the fuse set selection signal.

9. The smart self-repair device according to claim 3 , wherein the row/column address registers receive bank addresses, a row address and a column address of a failed memory cell, a row repair flag signal and a column region identification signal, and sequentially store the row address and the column address in a plurality of registers in correspondence to storage signals.

10. The smart self-repair device according to claim 3 , wherein the multi-bit counters increase count values where comparison results of the address comparison sections are equivalent.

11. The smart self-repair device according to claim 3 , wherein the multi-bit counters change count values which serve as references for a row-oriented fail or a column-oriented fail.

12. The smart self-repair device according to claim 1 , wherein the repair selection unit further comprises:
a first selection section configured to select any one of outputs of row/column address registers in correspondence to selection signals; and
a second selection section configured to select any one of the outputs of multi-bit counters in correspondence to the selection signals, and output it to a fail mode analysis section.

13. The smart self-repair device according to claim 12 , wherein the first selection section selects any one of the outputs of the row/column address registers, and outputs a row redundancy signal which represents whether a fail bit uses a row redundancy or not, to the fail mode analysis section.

14. The smart self-repair device according to claim 1 , wherein the fuse set selection unit comprises:
a fail region search section configured to search a row address fail region and a column address fail region in correspondence to an output of a first selection section; and
a row/column fuse set register configured to store information on unused fuse sets, and output the information to a fail mode analysis section and the rupture control block.

15. The smart self-repair device according to claim 14 , wherein the fuse set selection unit further comprises:
a counter configured to count a clock, and output counting signals to the fail region search section, a row/column fuse set register, the rupture control block and the ARE array.

16. The smart self-repair device according to claim 14 , wherein a row/column fuse set register receives a row region signal and a column region signal which are applied from the fail region search section, a clock, row fuse set signals and column fuse set signals which are applied from the ARE array, and a fuse set selection signal, outputs a row fuse nonuse signal and a column fuse nonuse signal to a fail mode analysis section, outputs fuse set signals to the data control block, and outputs a fuse nonuse signal to the rupture control block.

17. The smart self-repair device according to claim 1 , wherein, in correspondence to outputs of the self-repair control block, the

Assignees

• Sk Hynix Inc

Inventors

• Shim Young Bo

Classifications

• G11C29/4401

  for self repair · CPC title

• G11C17/18

  Auxiliary circuits, e.g. for writing into memory · CPC title

• G11C29/78 Primary

  using programmable devices · CPC title

• G11C17/16

  using electrically-fusible links · CPC title

• G11C7/20

  Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory · CPC title