Pixel structure and manufacturing method therefor, array structure, display panel and display device

Patent metadata

Field	Value
Publication number	US-9563095-B2
Application number	US-201514742599-A
Country	US
Kind code	B2
Filing date	Jun 17, 2015
Priority date	Oct 10, 2014
Publication date	Feb 7, 2017
Grant date	Feb 7, 2017

Abstract

A pixel structure and manufacturing method therefor, an array structure, a display panel and a display device. And the pixel structure includes data lines; scan lines; pixel units formed by intersecting the data lines with the scan lines, where each pixel unit corresponds to one data line and one scan line; a TFT and a pixel electrode disposed in each of pixel units, where the pixel electrode includes slits, at least one of which includes at least one corner area at an end thereof; where the pixel electrode in a row is electrically connected to a TFT in a pixel unit, the pixel unit is disposed in the same row as and adjacently at one side of the pixel electrode, and at least one corner area of the pixel electrode extends toward the TFT electrically connected to the pixel electrode.

First claim

We claim:

1. A pixel structure comprising:
a plurality of data lines;
a plurality of scan lines;
a plurality of pixel units formed by intersecting the plurality of data lines with the plurality of scan lines, wherein each of the plurality of pixel units corresponds to a respective one of the data lines and a respective one of the scan lines; and
a TFT and a pixel electrode disposed in each of the pixel units, wherein the pixel electrode comprises a plurality of slits, at least one of the slits comprises at least one corner area at an end thereof;
wherein the plurality of pixel units comprise a first pixel unit and a second pixel unit, the first pixel unit and the second pixel unit are in a same row and adjacent to each other, the pixel electrode in the first pixel unit is electrically connected to the TFT in the second pixel unit, and the at least one corner area at the end of the at least one of the slits in the first pixel unit extends toward the TFT in the second pixel unit.

2. The pixel structure of claim 1 , wherein the TFT is disposed close to the pixel electrode electrically connected thereto.

3. The pixel structure of claim 2 , wherein a portion of a data line is bent in the pixel unit where the TFT is disposed, so as to match a position of the TFT.

4. The pixel structure of claim 1 , wherein the pixel electrode partially overlaps with the data line which disposed between two adjacent pixel electrodes.

5. The pixel structure of claim 4 , further comprising a common electrode located between the pixel electrode and a film layer, a source electrode and a drain electrode of the thin film transistor electrically connected with the pixel electrode are located in the film layer, and the common electrode is insulated from the pixel electrode and the film layer.

6. The pixel structure of claim 1 , wherein a source of the TFT is electrically connected to the data line corresponding to the pixel unit comprising the pixel electrode electrically connected to the TFT; and
a gate electrode of the TFT is electrically connected to the scan line corresponding to the pixel unit comprising the pixel electrode electrically connected to the TFT.

7. The pixel structure of claim 1 , wherein the pixel units are arranged in a staggered manner or as a matrix.

8. The pixel structure of claim 1 , wherein, the pixel electrode in the first pixel unit is electrically connected to the TFT in the second pixel unit through a bridging conductive line, and the at least one corner area extend into the bridging conductive line.

9. A manufacturing method for a pixel structure, comprising:
forming a plurality of TFTs;
forming a plurality of data lines and a plurality of scan lines, wherein a plurality of pixel units are formed by intersecting the plurality of data lines with the plurality of scan lines, and each of the plurality of pixel units corresponds to a respective one of the data lines and a respective one of the scan lines and includes a respective one of the TFTs; and
forming a plurality of pixel electrodes, wherein each of the plurality of pixel electrodes is disposed in a respective one pixel unit and comprises a plurality of slits, at least one of which comprises at least one corner area at an end thereof, and the plurality of pixel units comprise a first pixel unit and a second pixel unit, the first pixel unit and the second pixel unit are in a same row and adjacent to each other, the pixel electrode in the first pixel unit is electrically connected to the TFT in the second pixel unit, and the at least one corner area at the end of the at least one of the slits in the first pixel unit extends toward the TFT in the second pixel unit.

10. The manufacturing method of claim 9 , wherein the pixel electrode in the first pixel unit is electrically connected to the TFT in the second pixel unit through a bridging conductive line, and the at least one corner area extend into the bridging conductive line.

11. A display panel, comprising an array substrate which comprises a pixel structure comprising:
a plurality of data lines;
a plurality of scan lines;
a plurality of pixel units formed by intersecting the plurality of data lines with the plurality of scan lines, wherein each of the plurality of pixel units corresponds to a respective one of the data lines and a respective one of the scan lines; and
a TFT and a pixel electrode disposed in each of the pixel units, wherein the pixel electrode comprises a plurality of slits, at least one of the slits comprises at least one corner area at an end thereof;
wherein the plurality of pixel units comprise a first pixel unit and a second pixel unit, the first pixel unit and the second pixel unit are in a same row and adjacent to each other, the pixel electrode in the first pixel unit is electrically connected to the TFT in the second pixel unit, and the at least one corner area at the end of the at least one of the slits in the first pixel unit extends toward the TFT in the second pixel unit.

12. The display panel of claim 11 , wherein the pixel electrode in the first pixel unit is electrically connected to the TFT in the second pixel unit through a bridging conductive line, and the at least one corner area extend into the bridging conductive line.

13. A display device, comprising a display panel which comprises an array substrate, the array substrate comprises a pixel structure comprising:
a plurality of data lines;
a plurality of scan lines;
a plurality of pixel units formed by intersecting the plurality of data lines with the plurality of scan lines, wherein each of the plurality of pixel units corresponds to a respective one of the data lines and a respective one of the scan lines;
a TFT and a pixel electrode disposed in each of the pixel units, wherein the pixel electrode comprises a plurality of slits, at least one of the slits comprises at least one corner area at an end thereof; and
wherein the plurality of pixel units comprise a first pixel unit and a second pixel unit, the first pixel unit and the second pixel unit are in a same row and adjacent to each other, the pixel electrode in the first pixel unit is electrically connected to the TFT in the second pixel unit, and the at least one corner area at the end of the at least one of the slits in the first pixel unit extends toward the TFT in the second pixel unit.

14. The display device of claim 13 , wherein the pixel electrode in the first pixel unit is electrically connected to the TFT in the second pixel unit through a bridging conductive line, and the at least one corner area extend into the bridging conductive line.

Assignees

• Shanghai Avic Opto Electronics Co Ltd
• Tianma Microelectronics Co Ltd

Inventors

• Wang Tinghai
• Cao Zhaokeng
• Lin Yao
• Qin Dandan

Classifications

• G02F1/134363

  for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS] · CPC title

• H01L27/1259

  Electricity · mapped topic

• H01L27/124

  Electricity · mapped topic

• G02F1/133707

  Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes · CPC title

• G02F1/1368 Primary

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title