Source driver, an image display assembly and an image display apparatus

Patent metadata

Field	Value
Publication number	US-9557616-B2
Application number	US-201113242394-A
Country	US
Kind code	B2
Filing date	Sep 23, 2011
Priority date	Sep 24, 2010
Publication date	Jan 31, 2017
Grant date	Jan 31, 2017

Abstract

An image display panel assembly includes a flexible printed circuit (FPC), an image display panel, a gate driver integrated circuit (IC) package, and a source driver IC package. The FPC is configured to receive gate and source driving signals. The image display panel is electrically connected to the FPC, and includes a gate driving signal transfer pattern along a first edge of the image display panel, a source driving signal transfer pattern along a second edge adjacent to the first end, and a plurality of pixels. The gate driver integrated circuit (IC) package is configured to receive the gate driving signal through the gate driving signal transfer pattern and provide the gate driving signal to the plurality of pixels. The source driver IC package is configured to receive the source driving signal through the source driving signal transfer pattern and provide the source driving signal to the plurality of pixels.

First claim

What is claimed is:

1. An image display panel assembly, comprising:
a printed circuit board (PCB) that includes a semiconductor chip configured to provide a gate driving signal and a source driving signal;
a flexible printed circuit (FPC) that has a first end that is bonded to, and electrically connected to, the PCB, the FPC including,
a first source signal pattern configured to receive the source driving signal from the semiconductor chip, and
a first gate signal pattern that is separate from the first source signal pattern and configured to receive the gate driving signal from the semiconductor chip,

an image display panel electrically connected to a second end of the FPC, the image display panel including a gate driving signal transfer pattern along a first edge of the image display panel, a source driving signal transfer pattern along a second edge adjacent to the first edge, and a plurality of pixels;
at least one gate driver integrated circuit (IC) package configured to receive the gate driving signal through the first gate signal pattern and the gate driving signal transfer pattern, and configured to provide the gate driving signal to gate lines of the plurality of pixels; and
at least one source driver IC package configured to receive the source driving signal through the first source signal pattern and the source driving signal transfer pattern, and configured to provide the source driving signal to source lines of the plurality of pixels,
wherein the at least one source driver IC package includes,
a base substrate, the base substrate being directly bonded to the image display panel, the base substrate including a flexible insulating material, and the base substrate not being bonded to the PCB,
a source driver IC mounted on the base substrate and configured to receive and provide the source driving signal,
a source driving signal input pattern electrically connected to the source driver IC and receives the source driving signal, and
a source driving signal output pattern that is electrically connected to the source driver IC and configured to provide the source driving signal to the source lines of the plurality of pixels.

2. The image display panel assembly of claim 1 , wherein the source driving signal input pattern and the source driving signal output pattern both extend from the source driver IC towards the image display panel.

3. The image display panel assembly of claim 1 , wherein the FPC is on a corner portion between the first edge and the second edge of the image display panel.

4. The image display panel assembly of claim 1 , wherein the FPC is on a portion of the second edge of the image display panel.

5. The image display panel assembly of claim 1 , wherein the at least one source driver IC package and the at least one gate driver IC package are chip-on film (CoF) packages.

6. The image display panel assembly of claim 1 , wherein the gate driving signal transfer pattern electrically connects the FPC to the at least one gate driver IC package or connects the at least one gate driver IC package to at least one other gate driver IC package.

7. The image display panel assembly of claim 1 , wherein,
the gate driving signal transfer pattern is one of a plurality of gate driving signal transfer patterns along a first edge of the image display panel,
the source driving signal pattern is one of a plurality of source driving signal transfer patterns along a second edge adjacent to the first edge, the plurality of gate driving signal transfer patterns configured to transfer the gate driving signal and the plurality of source driving signal transfer patterns configured to transfer the source driving signal,
the at least one gate driver IC is a plurality of gate driver IC packages along the first edge of the image display panel, the plurality of gate driver IC packages configured to receive the gate driving signal through the gate driving signal transfer patterns, and configured to transfer the gate driving signal to an adjacent gate driver IC package or to provide the gate driving signal to the image display panel,
the at least one source driver IC package is a plurality of source driver IC packages along the second edge of the image display panel, the plurality of source driver IC packages configured to receive the source driving signal through the source driving signal transfer patterns, and configured to transfer the source driving signal to an adjacent source driver IC package or to provide the source driving signal to the image display panel,
wherein the source driving signal input patterns of each of the plurality of source driver ICs extend, respectively, in a first direction from the plurality of source driver ICs towards a renter of the image display panel,
wherein the source driving signal output patterns of each of the plurality of source driver ICs extend, respectively, in the first direction from the plurality of source driver ICs towards a center of the image display panel, and
wherein each of the plurality of source driver IC further includes,
a source driving signal via pattern on the base substrate and configured to receive and output a via source driving signal included in the source driving signal without providing the via source driving signal to the source driver IC.

8. The image display panel assembly of claim 7 , wherein the PCB is configured to communicate with an external device to receive an image signal, the semiconductor chip is configured to generate the source and gate driving signals, and the semiconductor chip is configured to provide the source and gate driving signals to the FPC.

9. The image display panel assembly of claim 8 , wherein the PCB is bent towards and fixed at a rear surface of the image display panel.

10. The image display panel assembly of claim 8 , wherein the PCB is bent and fixed in a direction perpendicular to a surface of the image display panel.

11. The image display panel assembly of claim 7 , wherein each of the plurality of source driver IC packages further comprises:
a sorted source driving signal transfer pattern electrically connected to the source driver IC and in a direction of the image display panel, the sorted source driving signal transfer pattern configured to output a sorted source driving signal that is sorted by the source driver IC.

12. The image display panel assembly of claim 7 , wherein the FPC is bonded to a portion of the second edge of the image display panel.

13. The image display panel assembly of claim 1 , wherein the at least one source driver IC package further comprises:
a source driving signal via pattern configured to bypass the at least one source driver IC package and output the source driving signal to another source driver IC package.

14. The image display panel assembly of claim 1 , wherein the base substrate of the at least one source driver IC package is not directly bonded to the PCB.

15. An image display panel assembly, comprising:
a printed circuit board (PCB) that includes a semiconductor chip configured to provide a gate driving signal and a source driving signal;
a flexible printed circuit (FPC) that has a first end that is bonded to, and electrically connected to, the PCB, the FTC including,
a first source signal pattern configured to receive the source driving signal from the semiconductor chip, and
a first gate signal pattern that is separate from the first source signal pattern and configured to receive the gate driving signal from the semiconductor chip,

an image display panel electrically connected to a second end of the FPC, the image display panel including a gate driving si

Assignees

• Chung Ye-Chung
• Lee Hee-Seok
• Choi Yun-Seok
• Kim Keung-Beum
• Samsung Electronics Co Ltd

Inventors

• Chung Ye-Chung
• Lee Hee-Seok
• Choi Yun-Seok
• Kim Keung-Beum

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/255

  of outermost layers of multilayered bumps, e.g. material of a coating · CPC title

• H10W72/252

  comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W90/00

  Package configurations · CPC title