Control circuit with chopping amplifier for switching converter

Patent metadata

Field	Value
Publication number	US-9553513-B2
Application number	US-201514797071-A
Country	US
Kind code	B2
Filing date	Jul 10, 2015
Priority date	Jul 11, 2014
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

A control circuit for switching converter has a chopping amplifier, a sample-hold circuit, a first comparator, an oscillator and a logic circuit. The chopping amplifier generates an amplified error signal based on a reference signal and a feedback signal. The sample-hold circuit generates a sample-hold signal based on the amplified error signal. The first comparator generates a first logic signal based on a comparison result between the sample-hold signal and a current sensing signal representing a current flowing through a power switch in the switching converter. The oscillator generates a clock signal. The logic circuit generates a control signal based on the first logic signal and the clock signal, the control signal is used to control the power switch.

First claim

I claim:

1. A control circuit for a switching converter with at least a power switch, comprising:
a chopping amplifier having a first input terminal, a second input terminal, a control terminal and an output terminal, wherein the first input terminal is configured to receive a reference signal, and wherein the second input terminal is configured to receive a feedback signal representing an output voltage or a load current of the switching converter, and wherein the control terminal is configured to receive a chopping control signal, and wherein based on the reference signal and the feedback signal, the chopping amplifier is operable to generate an amplified error signal at the output terminal;
a sample-hold circuit having an input terminal, an output terminal and a control terminal, wherein the input terminal is coupled to the output terminal of the chopping amplifier, and wherein the control terminal is configured to receive a sample-hold control signal, and wherein the sample-hold circuit generates a sample-hold signal at the output terminal;
a first comparator having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the output terminal of the sample-hold circuit, and wherein the second input terminal is configured to receive a current sensing signal representing a current flowing through the power switch, and wherein based on a comparison result between the sample-hold signal and the current sensing signal, the first comparator generates a first logic signal at the output terminal;
an oscillator, generating a clock signal; and
a logic circuit having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is configured to receive the first logic signal, and wherein the second input terminal is configured to receive the clock signal, and wherein based on the first logic signal and the clock signal, the logic circuit generates a switching signal at the output terminal, and wherein the switching signal is configured to control the power switch.

2. The control circuit according to claim 1 , wherein the switching converter is configured in a BUCK converter.

3. The control circuit according to claim 1 , wherein the chopping amplifier comprises a first chopper, an input stage, a second chopper and an output stage, and wherein the first chopper, the input stage, the second chopper and the output stage are serially coupled in sequence, and wherein the chopping control signal is configured to control both the first chopper and the second chopper.

4. The control circuit according to claim 1 , wherein the control circuit further comprises a frequency divider having an input terminal and an output terminal, and wherein the input terminal is configured to receive the clock signal or the switching signal, and wherein the frequency divider is configured to generate the chopping control signal.

5. The control circuit according to claim 4 , wherein the control circuit further comprise a pulse generating circuit having an input terminal and an output terminal, and wherein the input terminal is configured to receive the chopping control signal, and wherein the pulse generating circuit is configured to generate the sample-hold control signal having substantially the same frequency as the frequency of the chopping control signal.

6. The control circuit according to claim 1 , wherein the frequency of the chopping control signal is N times of the frequency of the sample-hold control signal, and wherein N is an integer greater than 0.

7. A control circuit for a switching converter with at least a power switch, comprising:
a chopping amplifier having a first input terminal, a second input terminal, a control terminal and an output terminal, wherein the first input terminal is configured to receive a reference signal, and wherein the second input terminal is configured to receive a feedback signal representing an output voltage or a load current of the switching converter, and wherein the control terminal is configured to receive a chopping control signal, and wherein based on the reference signal and the feedback signal, the chopping amplifier is operable to generate an amplified error signal at the output terminal;
a sample-hold circuit having an input terminal, an output terminal and a control terminal, wherein the input terminal is coupled to the output terminal of the chopping amplifier, and wherein the control terminal is configured to receive a sample-hold control signal, and wherein the sample-hold circuit generates a sample-hold signal at the output terminal;
a first comparator having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the output terminal of the sample-hold circuit, and wherein the second input terminal is configured to receive the feedback signal, and wherein based on a comparison result between the sample-hold signal and the feedback signal, the first comparator generates an ON signal at the output terminal;
an OFF signal generating circuit, generating an OFF signal at the output terminal; and
a logic circuit having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is configured to receive the ON signal, and wherein the second input terminal is configured to receive the OFF signal, and wherein based on the ON signal and the OFF signal, the logic circuit provides a switching signal at the output terminal, and wherein the switching signal is configured to control the power switch.

8. The control circuit according to claim 7 , wherein the switching converter is configured in a BUCK converter.

9. The control circuit according to claim 7 , wherein
the OFF signal decides an on time of the converter circuit, wherein during the on time, the power switch is ON; and
the ON signal decides an off time of the converter circuit, wherein during the off time, the power switch is OFF.

10. The control circuit according to claim 7 , wherein the chopping amplifier comprises a first chopper, an input stage, a second chopper and an output stage, and wherein the first chopper, the input stage, the second chopper and the output stage are serially coupled in sequence, and wherein the chopping control signal is configured to control both the first chopper and the second chopper.

11. The control circuit according to claim 7 , wherein the control circuit further comprises a frequency divider having an input terminal and an output terminal, and wherein the input terminal is configured to receive the OFF signal or the switching signal, and wherein the frequency divider is configured to generate the chopping control signal.

12. The control circuit according to claim 11 , wherein the control circuit further comprise a pulse generating circuit having an input terminal and an output terminal, and wherein the input terminal is configured to receive the chopping control signal, and wherein the pulse generating circuit is configured to generate the sample-hold control signal having substantially the same frequency as the frequency of the chopping control signal.

13. The control circuit according to claim 7 , wherein the frequency of the chopping control signal is N times of the frequency of the sample-hold control signal, and wherein N is an integer greater than 0.

14. The control circuit according to claim 7 , wherein the control circuit further comprise:
a current sensing circuit having an input terminal and an output terminal, wherein based on a current flowing through the power switch, the current sensing circuit provides a current se

Assignees

• Chengdu Monolithic Power Sys

Inventors

• Xu Li

Classifications

• H02M3/156 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H02M1/0025

  Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title