Semiconductor device, manufacturing method thereof, and electronic device

Patent metadata

Field	Value
Publication number	US-9553202-B2
Application number	US-201414489074-A
Country	US
Kind code	B2
Filing date	Sep 17, 2014
Priority date	May 30, 2014
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

The semiconductor device includes a first layer including a first transistor, a second layer including a first insulating film over the first layer, a third layer including a second insulating film over the second layer, and a fourth layer including a second transistor over the third layer. A first conductive film electrically connects the first transistor and the second transistor to each other through an opening provided in the first insulating film. A second conductive film electrically connects the first transistor, the second transistor, and the first conductive film to one another through an opening provided in the second insulating film. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The width of a bottom surface of the second conductive film is 5 nm or less.

First claim

The invention claimed is:

1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first transistor including a single crystal semiconductor as a channel;
forming a first insulating film over the first transistor;
forming an oxide semiconductor film over the first insulating film;
forming a first conductive film over the oxide semiconductor film;
forming an inorganic film over the first conductive film;
forming a first mask over the inorganic film;
forming a second mask including the inorganic film by processing the inorganic film using the first mask as a mask;
forming an opening in the first conductive film, the oxide semiconductor film, and the first insulating film using the second mask as a mask; and
forming a second conductive film which penetrates the first conductive film, the oxide semiconductor film, and the first insulating film in the opening,
wherein the first mask is a resist mask,
wherein the oxide semiconductor film and the first conductive film are included in a second transistor, and
wherein the second conductive film is electrically connected to the first transistor and the second transistor.

2. The method for manufacturing a semiconductor device according to claim 1 , further comprising the step of:
polishing the second conductive film.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein a width of a bottom surface of the second conductive film is 5 nm or less.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein the first conductive film is in contact with a source region or a drain region of the first transistor.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein, assuming that a center of a top surface of a gate electrode of the first transistor is at an apex of an inverted square pyramid with a square and first to fourth isosceles triangles each having a vertex angle of 120° or less, a bottom surface of the oxide semiconductor film fits inside the square.

6. The method for manufacturing a semiconductor device according to claim 5 ,
wherein the center of the top surface of the gate electrode of the first transistor and a center of a top surface of a gate electrode of the second transistor overlap with each other, and
wherein the center of the top surface of the gate electrode of the first transistor and a center of a top surface of the oxide semiconductor film overlap with each other.

7. The method for manufacturing a semiconductor device according to claim 1 , further comprising a capacitor between the first transistor and the second transistor.

8. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first transistor including a single crystal semiconductor as a channel;
forming a first insulating film over the first transistor;
forming an oxide semiconductor film over the first insulating film;
forming a first conductive film over the oxide semiconductor film;
forming an inorganic film over the first conductive film;
forming a first mask over the inorganic film with an organic resin film therebetween;
forming a second mask including the inorganic film by processing the inorganic film using the first mask as a mask;
forming an opening in the first conductive film, the oxide semiconductor film, and the first insulating film using the second mask as a mask; and
forming a second conductive film which penetrates the first conductive film, the oxide semiconductor film, and the first insulating film in the opening,
wherein the first mask is a resist mask,
wherein the oxide semiconductor film and the first conductive film are included in a second transistor, and
wherein the second conductive film is electrically connected to the first transistor and the second transistor.

9. The method for manufacturing a semiconductor device according to claim 8 , further comprising the step of:
polishing the second conductive film.

10. The method for manufacturing a semiconductor device according to claim 8 , wherein a width of a bottom surface of the second conductive film is 5 nm or less.

11. The method for manufacturing a semiconductor device according to claim 8 , wherein the first conductive film is in contact with a source region or a drain region of the first transistor.

12. The method for manufacturing a semiconductor device according to claim 8 , wherein, assuming that a center of a top surface of a gate electrode of the first transistor is at an apex of an inverted square pyramid with a square and first to fourth isosceles triangles each having a vertex angle of 120° or less, a bottom surface of the oxide semiconductor film fits inside the square.

13. The method for manufacturing a semiconductor device according to claim 12 ,
wherein the center of the top surface of the gate electrode of the first transistor and a center of a top surface of a gate electrode of the second transistor overlap with each other, and
wherein the center of the top surface of the gate electrode of the first transistor and a center of a top surface of the oxide semiconductor film overlap with each other.

14. The semiconductor device according to claim 8 , further comprising a capacitor between the first transistor and the second transistor.

15. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first transistor including a single crystal semiconductor as a channel;
forming a first insulating film over the first transistor;
forming an oxide semiconductor film over the first insulating film;
forming a first conductive film over the oxide semiconductor film;
forming an inorganic film over the first conductive film;
forming a first mask over the inorganic film;
forming a second mask including the inorganic film by processing the inorganic film using the first mask as a mask;
forming a third mask including the inorganic film and the first conductive film by processing the first conductive film using the second as a mask;
forming an opening in the oxide semiconductor film, and the first insulating film using the third mask as a mask; and
forming a second conductive film which penetrates the first conductive film, the oxide semiconductor film, and the first insulating film in the opening,
wherein the first mask is a resist mask,
wherein the oxide semiconductor film and the first conductive film are included in a second transistor, and
wherein the second conductive film is electrically connected to the first transistor and the second transistor.

16. The method for manufacturing a semiconductor device according to claim 15 ,
wherein the first mask is formed over the inorganic film with an organic resin film.

17. The method for manufacturing a semiconductor device according to claim 15 , further comprising the step of:
polishing the second conductive film.

18. The method for manufacturing a semiconductor device according to claim 15 , wherein a width of a bottom surface of the second conductive film is 5 nm or less.

19. The method for manufacturing a semiconductor device according to claim 15 , wherein the first conductive film is in contact with a source region or a drain region of the first transistor.

20. The method for manufacturing a semiconductor device according to claim 15 , wherein, assuming that a center of a top surface of a gate electrode of the first transistor is at an apex of an inverted square pyramid with a square and first to fourth isosceles triangles ea

Assignees

• Semiconductor Energy Lab

Inventors

• Kurata Motomu
• Sasagawa Shinya
• Hodo Ryota
• Tochibayashi Katsuaki
• Moriwaka Tomoaki
• Nishida Jiro
• Miyairi Hidekazu
• Yamazaki Shunpei

Classifications

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H10D86/01

  Manufacture or treatment · CPC title

• H10D30/6713

  characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

• H10D30/6704

  having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title

• H10D84/80

  characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs (H10D84/40 takes precedence) · CPC title