Semiconductor device having supporter

Patent metadata

Field	Value
Publication number	US-9553141-B2
Application number	US-201514858069-A
Country	US
Kind code	B2
Filing date	Sep 18, 2015
Priority date	Nov 21, 2012
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

A semiconductor device includes a plurality of lower electrodes having a vertical length greater than a horizontal width on a substrate, a supporter disposed between the lower electrodes, an upper electrode disposed on the lower electrodes, and a capacitor dielectric layer disposed between the lower electrodes and the upper electrode. The supporter includes a first element, a second element, and oxygen, an oxide of the second element has a higher band gap energy than an oxide of the first element, and the content of the second element in the supporter is from about 10 at % to 90 at %.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a plurality of lower electrodes disposed on a substrate;
an intermediate supporter, first upper supporter, and second upper supporter disposed between the lower electrodes;
an upper electrode disposed on the lower electrodes; and
a capacitor dielectric layer disposed between the lower electrodes and the upper electrode, wherein:
the intermediate supporter is formed at an intermediate level between upper ends and lower ends of the lower electrodes,
the first and second upper supporters are spaced apart from the intermediate supporter, and are adjacent to the upper ends of the lower electrodes,
the intermediate supporter and the first upper supporter include a first element, a second element, and oxygen,
an oxide of the first element has better adhesion to the lower electrodes than the second upper supporter, and
an oxide of the second element has a higher band gap energy than the oxide of the first element.

2. The semiconductor device as claimed in claim 1 , further comprising a second lower supporter on the intermediate supporter and a third supporter on the second lower supporter, wherein the second lower supporter has a smaller horizontal width than the intermediate supporter and the third supporter, and at least some of the lower electrodes include a portion that protrudes between the intermediate supporter and the third supporter.

3. The semiconductor device as claimed in claim 1 , further comprising:
a second lower supporter on the intermediate supporter;
a third supporter on the second lower supporter;
a fourth supporter disposed over the third supporter; and
a fifth supporter disposed over the fourth supporter,
wherein the fifth supporter includes the same material as the first and third supporters and has a thickness of from about 0.1 nm to 5 nm.

4. The semiconductor device as claimed in claim 3 , wherein the second lower supporter and the fourth supporter include silicon nitride, silicon oxy-nitride, silicon oxide, aluminum oxide, or a combination thereof.

5. The semiconductor device as claimed in claim 3 , wherein:
each of the intermediate supporter, the third supporter, and the fifth supporter is in contact with the lower electrodes, and
the second lower supporter is disposed over and contacting the intermediate supporter, the third supporter is disposed over and contacting the second lower supporter, the fourth supporter is disposed over and contacting the third supporter, and the fifth supporter is disposed over and contacting the fourth supporter.

6. The semiconductor device as claimed in claim 1 , further comprising a second lower supporter between the lower electrodes, wherein the intermediate supporter is formed between the lower electrodes and the second lower supporter, and is in contact with the lower electrodes and the second lower supporter, and has a horizontal width of from about 0.1 nm to 5 nm.

7. The semiconductor device as claimed in claim 1 , wherein the capacitor dielectric layer is in direct contact with the intermediate supporter.

8. The semiconductor device as claimed in claim 1 , wherein the capacitor dielectric layer is in direct contact with the lower electrodes and the upper electrode.

9. The semiconductor device as claimed in claim 1 , wherein the upper electrode is disposed on upper and lateral surfaces of the lower electrodes.

10. A semiconductor device, comprising:
a plurality of lower electrodes having a vertical length greater than a horizontal width;
a supporter formed between the lower electrodes, the supporter including an amorphous-state metal oxide;
an upper electrode disposed on the lower electrodes; and
a capacitor dielectric layer disposed between the lower electrodes and the upper electrode, wherein:
the supporter includes a first element, a second element, and oxygen, and
an oxide of the second element has a higher band gap energy than an oxide of the first element.

11. The semiconductor device as claimed in claim 10 , wherein the upper electrode is disposed on upper and lateral surfaces of the lower electrodes.

12. The semiconductor device as claimed in claim 10 , wherein the capacitor dielectric layer is in direct contact with the lower electrodes and the upper electrode.

13. A semiconductor device, comprising:
first and second lower electrodes disposed on a substrate, the first and second lower electrodes having an aspect ratio of at least about 10:1;
a supporter disposed between and contacting a lateral surface of each of the lower electrodes;
an upper electrode disposed over the supporter, over the first and second lower electrodes, and between the first and second lower electrodes; and
a capacitor dielectric layer disposed between the first and second lower electrodes and the upper electrode,
wherein the supporter includes an amorphous-state metal oxide, and an element or oxide compound having a band gap energy of at least about 5 eV.

14. The semiconductor device as claimed in claim 13 , wherein the supporter is a layer having a thickness of from about 0.1 nm to 5 nm.

15. The semiconductor device as claimed in claim 13 , wherein the amorphous-state metal oxide remains in an amorphous state upon exposure to temperatures of at least about 950° C.

16. The semiconductor device as claimed in claim 15 , wherein the amorphous-state metal oxide remains in an amorphous state upon exposure to temperatures of at least about 1200° C.

17. The semiconductor device as claimed in claim 13 , wherein the supporter includes a first layer and a second layer, the first layer including the amorphous metal oxide, and the second layer including the element or oxide compound having a band gap of at least about 5 eV.

18. The semiconductor device as claimed in claim 13 , wherein the semiconductor device further includes a second supporter, the second supporter including one or more of silicon nitride, silicon oxy-nitride, silicon oxide, and aluminum oxide.

19. The semiconductor device as claimed in claim 18 , wherein the capacitor dielectric layer is in direct contact with the second supporter.

20. The semiconductor device as claimed in claim 13 , wherein the capacitor dielectric layer is in direct contact with the first and second lower electrodes and the upper electrode.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yang Hyun-Jeong
• Jung Soon-Wook
• Kuh Bong-Jin
• Kim Wan-Don
• Chung Byung-Hong
• Tak Yong-Suk

Classifications

• H10B12/033 Primary

  the capacitor extending over the transistor · CPC title

• H10D1/042

  using deposition processes to form electrode extensions · CPC title

• H10D1/714

  having horizontal extensions · CPC title

• H10D1/716 Primary

  having vertical extensions · CPC title

• H01L27/10852

  Electricity · mapped topic